Digital-to-analogue converters with multiple step movement

Details Digital-to-analogue converters with multiple step movement Digital-to-analogue converters with multiple step movement

1999-03-09

2001-08-07

Jeanpierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S150000

Reexamination Certificate

active

06271783

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The invention relates to digital-to-analogue converters, and particularly, but not exclusively, to digital-to-analogue converters for use in controlling thin-film display panels such as thin film transistor based (TFT-based) active matrix liquid crystal displays (AMLCDs).
The invention can, for example, be used in the driver circuits of low-power display panels supplied with parallel RGB video data and which perform the task of digital-to-analogue (D/A) conversion, and in the driver circuits of digital portable equipment.
It is known to carry out so-called “quasi-adiabatic charging” in order to minimise the power associated with charging capacitive loads to particular voltage levels. Application of the scheme is mentioned in A. Chandrakasan and R. Brodersen.
Low Power Digital CMOS Design.
Kluwer Academic Publishers, 1995; and U.S. Pat. No. 5,473,526. The principle of quasi-adiabatic charging will now be briefly described.
DESCRIPTION OF THE RELATED ART
FIG.
1
(
a
) shows a capacitor C and resistor R connected in series to two switches, S
1
and S
2
. Assuming that the capacitor is initially discharged and that both S
1
and S
2
are open, both plates of the capacitor are grounded, and at a potential of zero. S
1
is connected to a voltage supply V. When S
1
is closed, the capacitor is charged to voltage V with time constant RC. When equilibrium is reached, the total charge that has flowed through the resistor and is now stored on the capacitor is CV. During the charging process, the voltage drop across the resistor varies from V to 0 volts, and has an average of V/2 (assuming the capacitance is linear). The energy dissipated in the resistor is therefore CV
2
/2. When the capacitor is discharged, by opening S
1
and closing S
2.
, the same amount of energy is dissipated in the resistor. If the charging and discharging phases are performed at a frequency f, then the power dissipated in the resistor is equal to CV
2
f.
FIG.
1
(
b
) shows the same RC load, this time connected to one of three reference voltages, V, V/2 and ground, by way of switches S
1
, S
2
and S
3
respectively. Initially, the capacitor is discharged and all the switches are open. When S
2
is closed, the capacitor is charged to V/2 and the energy dissipated is CV
2
/8. S
2
is then opened, and S
1
is closed, and a further CV
2
/8 is dissipated. If, by controlling the operation of the switches, the capacitor is discharged to V/2 and then to ground, the extra energy consumed is CV
2
/4. If the stepped charging and discharging phases are repeated at a frequency f, then the total power dissipation of the system is CV
2
f/2. This is half the amount of power compared with the system of FIG.
1
(
a
).
When charging and discharging of the capacitor are each performed in N equal voltage steps, at a frequency f, the power consumption is CV
2
f/N. Indeed, in the limit of large N, an infinitesimally small current flows during each charging and discharging cycle, and no power is dissipated in the system, and the capacitor is then said to be charged and discharged adiabatically.
In this disclosure, stepped charging (and discharging) are referred to as quasi-adiabatic charging (and discharging). The technique of quasi-adiabatic charging clearly reduces the power dissipation. However it has found limited application because of the time penalty incurred by charging the load in steps. Furthermore, there is the extra overhead of reference voltages and switches (which, in reality, are themselves power consuming).
FIG. 2
shows a typical known active matrix display
10
comprising N rows and M columns of pixels
20
, the like of which is described in A. Lewis and W. Turner. Driver circuits for AMLCDs.
Journal of the Society for Information Display,
pages 56-64, 1995. It is the combined function of the data line driver
14
and scan line driver
18
to provide analogue data voltages to the electrodes of the liquid crystal (LC) pixels. This is achieved for a single row of pixels as follows.
The data driver
14
‘reads’ a line of pixel data that is to be displayed and charges up the data lines
12
to the corresponding pixel voltage. The appropriate scan line
16
is activated so that the appropriate row of pixel TFTs
24
are switched on. The pixel TFTs
24
transfer charge from the data line
12
to the pixel storage capacitance until the voltage of each is the same. The scan line
16
is then de-activated and the row of pixel TFTs
24
return to their high impedance state. The above operation is repeated for each row of pixels
20
in the display
10
.
Typical liquid crystal cells need to be driven by an AC voltage since ionic drift prevents DC voltages keeping the liquid crystal properly switched. AC driving of active matrices is usually achieved by one of the data line signals during successive image frames, while keeping the potential of the (opposing) common liquid crystal (LC) terminal constant. A second method involves reversing the common counter electrode potential and inverting the data line value during successive image frames. In order to prevent display flicker, during each frame, half of the pixels are driven by a voltage of positive polarity, and half of the pixels are driven by a voltage of negative polarity.
FIG. 3
illustrates different ways of dividing the pixels into the two groups. In FIG.
3
(
a
), column inversion is shown. Studies have shown that this scheme is not the best for reducing display flicker. See for example Y. Hirai and S. Kaneko. 13 inch EWS high resolution display with improved display quality by dot inversion drive.
Nikkei Micro
-
Device Flat Panel Display
1993, pages 120-123, 1993. FIG.
3
(
b
) shows row inversion which improves on the flicker problem, but introduces some cross-talk effects which result in image ‘ghosting’. As concluded in the Hirai and Kaneko reference mentioned above, the best scheme for reducing both flicker and cross-talk is pixel inversion (also known as dot inversion), which is shown in FIG.
3
(
c
).
Power consumption within the active matrix of AMLCD devices is associated with charging and discharging distributed capacitive loads (including TFT gate capacitance, pixel storage capacitance and parasitic substrate, overlap and fringe capacitance), through the data and gate lines which address the matrix. The power dissipated in the data and gate lines for a typical 10 inch diagonal XGA display with M×N=1024×768 pixels and a frame rate, f, of 60 Hz using row or pixel inversion, are computed below: Assuming a typical data line capacitance of 100 pF, and a typical data line transient voltage (assuming the liquid crystal (LC) is fully switched) of 8V (i.e.−4V to +4V), then the data line power consumption is given by:
P
d1
=
M
⁢
cv
2
2
⁢
fN
=
1024
×
100
×
10
-
12
×
8
2
2
×
768
×
60
=
151
⁢
 
⁢
mw
Assuming a typical gate line capacitance of 200 pF, and a typical gate line transient voltage of 20V, then the gate line power consumption is given by:
P
gl
=NCV
2
f=
768×200×10
−12
×20
2
×60=3.68 mw
Despite the higher capacitive load and voltage of the gate lines, the power dissipation associated with charging (and discharging) the data lines is clearly the most significant component. Convenient methods for reducing this power consumption are therefore desirable.
SUMMARY OF THE INVENTION
According to the invention there is provided a method of converting a digital input signal to a corresponding analogue output voltage, the method comprising the steps of receiving said digital input signal and moving said output voltage from a first value to a second value, wherein said second value corresponds with the value of said digital input signal and said output voltage is moved from said first value to said second value in at least two steps via one or more intermediate values.
An advantage of moving said output voltage in two or more steps, rather than a single step, is that if said output voltage is connected to a ca

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