Coded data generation or conversion – Converter calibration or testing
Reexamination Certificate
2001-07-20
2002-12-31
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Converter calibration or testing
C341S145000
Reexamination Certificate
active
06501402
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to digital-to-analogue converters, and particularly to converters which use an array of current sources to provide an analogue output.
2. Related Art
Digital-to-analogue converters of this type are widely used in numerous applications, and can be implemented as high speed converters suitable for use in telecommunication systems. In one arrangement, the array of current sources is arranged as a plurality of identical current sources. An associated switching array selectively routes the current source outputs to two possible output terminals. In some systems, one of these terminals is simply ground, and the other terminal is a current summing bus. The signal on the current summing bus is converted into a voltage before being provided as an output of the converter. In other systems, the output of the converter is to be provided on to twisted pair cabling. In this case, the current provided to one of the output terminals is converted to a voltage for one of the twisted pair wires, and the current provided to the other terminal is converted to a voltage for the other wire of the twisted pair. In this case, the converter output is represented as the difference between the voltage levels on the two wires of the twisted pair.
It has been recognised that to provide high precision, for example when converting more than 10 bits, it is necessary to calibrate the current sources constantly during the conversion process.
U.S. Pat. No. 5,870,044 discloses one circuit and method for providing calibration of the current sources used in the converter array. Essentially, an additional current source is provided, and the output of the additional current source is used to replace a current source within the array when that particular current source within the array is being calibrated. In this way, all current sources within the array can be calibrated in a cyclical manner. The additional current source avoids the need to interrupt the conversion process during calibration.
The calibration of individual current sources enables compensation for variations in layer thicknesses or other dimensions across the current source array. These variations across the array are static errors. There are also dynamic errors which result from the various parasitic capacitances within the current source circuits. After calibration of a current source to provide a desired output, changes in the charges stored on these parasitic capacitances vary the current source output over time. There is therefore also a need to carry out a continuous cyclical calibration process.
SUMMARY OF THE INVENTION
The invention is based on the recognition that a significant portion of the error in the output current of each current source will be a function of the time since that particular current source was calibrated. In particular, it has been recognised that there is a substantially linear increase in the error in the output current for each current source as a function of time since the most recent calibration of that current source.
According to the invention, there is provided a digital-to-analogue converter, comprising:
an array of current sources, each current source having an output which is switchable onto one of first and second terminals as a function of a digital input, such that a first number of current source outputs are switched to the first terminal and a second number of current source outputs are switched to the second terminal,
wherein the current source outputs are also switchable to a calibration unit, the current sources of the array being calibrated cyclically,
wherein the current source outputs switched to the first and second output terminals are selected as a function of the point within the calibration cycle.
One terminal may be an output and the other terminal may be ground. Alternatively, the two outputs may define a differential output signal.
The operation of the converter of the invention takes into account the current stage of the cyclic calibration process. For example, the average time since calibration for all current sources having outputs switched to the first terminal may be approximately equal to the average time since calibration for all current sources having outputs switched to the second terminal. In other words, the average time since calibration for each terminal is equal to half the calibration cycle duration.
By making the average time since calibration equal for the current sources switched to the two terminals, the average current of the cells switched to one terminal is identical to the average current of the cells switched to the other terminal, because the average current error is the same. The average current of the cells switched to each terminal remains constant in time and is independent of the digital input being converted. This ensures DAC linearity, both for single and double output systems.
In order to equal the average time since calibration for the current sources switched to the two terminals, the current sources most recently calibrated and the current sources calibrated the longest time ago may be switched to one of the output terminals, with the remaining current sources switched to the other output terminal.
The array of current sources may comprise a first plurality of identical current sources, the outputs of which are switched in dependence on the most significant bits of the digital input, and a second plurality of current sources, the outputs of which are switched in dependence on the least significant bits of the digital input.
This arrangement enables the advantages of identical current sources with the advantages of a binary array of current sources to be combined. In particular, the second plurality of current sources can comprise two current sources, and wherein the output of each current source of the second plurality is provided with a divider arrangement for providing the output on a plurality of lines, the currents on the individual lines being switchable to the first or second output terminals under the control of the least significant bits of the input.
This converter arrangement may implement a 14 bit converter, with 128 current sources for the seven most significant bits, and two current sources for the seven least significant bits.
The invention also provides a method of controlling a digital-to-analogue converter, the converter comprising an array of current sources, each current source having an output which is switchable onto one of first and second terminals as a function of a digital input, such that a first number of current source outputs are switched to the first terminal and a second number of current source outputs are switched to the second terminal, the method comprising:
cyclically calibrating the current sources of the array;
switching a first subset of the current source outputs to the first terminal and switching a second subset of the current source outputs to the second terminal, the first and second subsets together including all current sources other than the or each current source being calibrated, the switching being in dependence on the input digital signal,
wherein the first and second subsets are selected as a function of the point within the calibration cycle.
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patent: 5446445 (1995-08-01), Brooks
patent: 5703586 (1997-12-01), Tucholski
patent: 5870044 (1999-02-01), Dell'ova et al.
patent: 5949362 (1999-09-01), Tesch et al.
patent: 5955980 (1999-09-01), Hanna
patent: 6072415 (2000-06-01), Cheng
patent: 6424283 (2002-07-01), Bugeja et al.
Broadcom Corporation
Sterne Kessler Goldstein & Fox P.L.L.C.
Wamsley Patrick
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