Digital to analogue converter having input control bits for sele

Details Digital to analogue converter having input control bits for sele Digital to analogue converter having input control bits for sele

1996-09-18

1998-06-09

Gaffin, Jeffrey A.

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341144, 341153, 341154, H03M 166, H03M 182

Patent

active

057641730

ABSTRACT:
A digital to analogue converter having a plurality of output stages 46. Each output stage 46 includes a tri-state buffer 54 that outputs an on-signal, an off-signal or a pulse width modulated signal PWM that is selected by a multiplexer 52 that operates under control of a chord decoder 50 that is responsive to exponent bits within the input digital signal value. If a pulse width modulated signal is selected, then its duty cycle is controlled by a pulse width modulated decoder 48 that is responsive to mantissa bits within the input digital signal value. A further output provides a pulse width modulated signal of a predetermined duty cycle that may be used as a reference signal to compensate for variations in the operation of the rest of the digital to analogue circuit.

REFERENCES:
patent: 3653035 (1972-03-01), Carbrey
patent: 4484178 (1984-11-01), Lovgren et al.
patent: 5539408 (1996-07-01), Tani et al.

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