Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Utility Patent
1998-09-28
2001-01-02
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S144000
Utility Patent
active
06169508
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to digital-to-analogue (D/A) converters, and in particular to D/A converters in which an analogue output voltage resulting from the digital to analogue conversion is stored on a capacitor or capacitors of the converter. Various types of D/A converter store the analogue output voltage on an output capacitor.
For example, U.S. Pat. No. 5,332,997 discloses a D/A converter using a binary weighted capacitor network. This type of converter relies upon redistribution of charges stored within the capacitor network to arrive at an analogue voltage across the capacitor network which is representative of the digital input signal. This output voltage is then supplied through a buffer as the output of the D/A converter.
A problem with converters of the general type described above, and present in the converter described in U.S. Pat. No. 5,332,997, is the need for an output buffer to isolate the output signal stored on the capacitor (or capacitors) from the output load connected to the converter. Without this buffer, the capacitance of the output load causes attenuation of the output signal. If the capacitance of the output load approaches that of the storage capacitors of the converter, the analogue output voltage of the A/D converter is greatly affected. To reduce this problem, it is possible to increase the size of the storage capacitors in the converter, but this is undesirable from the point of view of layout and cost.
SUMMARY OF THE INVENTION
According to the present invention there is provided a digital to analogue converter comprising at least one capacitor for storing an analogue output voltage resulting from the digital to analogue conversion, the converter further comprising an output switch arrangement coupling the at least one capacitor to an output of the converter, means being provided for operating the output switch arrangement a plurality of times for each digital to analogue conversion, the analogue output voltage thereby being switched to the output of the converter a plurality of times for each digital to analogue conversion.
The converter of the invention switches the analogue signal to the output of the converter a plurality of times for each digital to analogue conversion, and this has the effect of progressively reducing the level of degradation of the output voltage caused by the load capacitance connected to the converter. It is thus possible to omit the conventional buffer amplifier at the output of the converter. There is thus a direct connection of the output switch arrangement to the converter output, meaning the absence of a buffer amplifier therebetween.
The converter may comprise a capacitor network, charges stored within the capacitor network representing a digital input signal. The analogue output voltage of the converter may then result from distribution of charges stored on the capacitors to produce an output voltage across the capacitor network. The invention is thus applicable to charge redistribution converters.
In one type of charge redistribution converter, the digital input comprises a plurality of parallel input bits, and the capacitor network comprises a binary weighted capacitor network, input bits being supplied through an associated coupling switch to one terminal of an associated capacitor of the capacitor network, the other terminals of the capacitors being connected together to a common line, the level of an input bit determining the voltage across the associated capacitor and thereby the charge stored thereon.
In another type of charge redistribution converter, the digital input comprises a plurality of serial input bits, and the capacitor network then comprises two equal-valued capacitors with first switching means enabling one of the capacitors to be charged or discharged depending upon the level of the incoming input bit, and second switching means enabling the charges stored on the two capacitors to be shared. The invention may be applied to this type of converter using a serial charge redistribution technique.
The invention can also be applied to other types of converter, provided the analogue voltage is stored on a capacitor or capacitors of the converter. In each case, the invention avoids the need for an output amplifier to isolate the converter capacitors from the load, which would otherwise be required in order to prevent the load from affecting the accuracy of the conversion.
The invention also provides a liquid crystal display comprising an array of liquid crystal pixels addressed by a row driver circuit and a column addressing circuit, the column addressing circuit comprising a plurality of digital to analogue converters of the invention.
Additionally, the invention provides a method of operating a digital to analogue converter, the converter comprising at least one capacitor for storing an analogue output voltage resulting from the digital to analogue conversion, the converter further comprising an output switch arrangement coupling the at least one capacitor to an output of the converter, the method comprising:
(i) generating an analogue voltage across the at least one capacitor depending upon the digital input signal and switching the analogue voltage to the output of the converter using the output switch arrangement;
(ii) isolating the output of the converter from the at least one capacitor using the output switch arrangement; and
(iii) repeating at least once steps (i) and (ii) for each digital to analogue signal conversion.
REFERENCES:
patent: 4451820 (1984-05-01), Kapral
patent: 4468654 (1984-08-01), Kapral
patent: 4584568 (1986-04-01), Zomorrodi
patent: 5332997 (1994-07-01), Dingwall et al.
Franzblau Bernard
Jeanglaude Jean B.
U.S. Philips Corporation
Williams Howard L.
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