Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2000-10-24
2003-01-21
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S121000, C341S141000, C341S143000, C341S144000, C341S154000
Reexamination Certificate
active
06509857
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to digital-to-analog (D/A) conversion for converting a digital input signal to an analog output signal, and more particularly, to a D/A converting method and a D/A converter which are capable of facilitating reduction or removal of relative errors among weight generating elements, which are introduced in the course of manufacturing of converters.
Conventionally, as a general conversion scheme for implementing D/A conversion, a so-called multi-bit scheme is known. Referring to
FIG. 22
, the D/A conversion in accordance with the multi-bit scheme will be described below. For a binary digital signal to be converted to an analog signal, a converting element or a weight generating element is provided for each of digits which constitutes the signal. The respective weight generating elements are designed and manufactured such that their weights have preset values for associated bits. In an example shown in
FIG. 22
, four binary bits (=16 levels) are expressed by four different forms of weight, i.e., x
1
, x
2
, x
4
, x
8
weights. In the D/A conversion in accordance with this scheme, the weight generating elements are controlled ON/OFF in accordance with the binary states of the respective digits of the binary digital signal (a black circle represents ON state, and a white circle represents OFF state) to generate an analog signal represented by the binary digital signal. With the use of this scheme, the total number of the weight generating elements is equal to the number of digits of a binary digital signal or a digital code if the simplest configuration is employed. Thus, a digital-to-analog (D/A) converter of the type mentioned above can be implemented on a relatively small chip area since a required number of elements is small, although respective elements may differ in physical size.
FIG. 23
shows another conventional conversion scheme for D/A conversion which comprises unit weight generating elements such as current sources having an almost equal weight to each other, equal in number to the decimal number represented by a binary digital code. Laid-open Japanese Patent Application No. 204527/89 discloses an example of a digital-to-analog converter in accordance with the configuration as shown. In the example shown in
FIG. 23
, binary four bits (=16 levels) are expressed by 16 single-weight generating elements, i.e., elements having a form of weight of x
1
. This type of D/A converter turns on a number of weight generating elements equal to a decimal value represented by a digital code, and sums up analog outputs generated thereby to derive a final analog signal. While the individual unit weight generating elements are less likely to generate errors in their outputs as compared with the first scheme mentioned above, the unit weight generating elements generally have minor errors which may cause nonlinearity appearing in the level of a resulting analog output signal, an increased distortion in an AC output signal, and so on, thereby limiting the analog performance. A technique for solving these troubles has been proposed. Specifically, in a time period in which a given digital code is converted to an analog amount, i.e., in a main period, a combination of used weight generating elements is dynamically changed to average output errors among unit weight generating elements. For combining unit weight generating elements, a variety of methods have been proposed. For example, Laid-open Japanese Patent Applications Nos. 48827/82 and 204527/89 disclose such methods. In either of the methods, however, a multiplicity of unit conversion elements are selected and used to produce a whole analog output level. The total number of unit conversion elements required by such a method for a 4-bit converter, by way of example, amounts to at least 15 (=2
4
−1). For a 16-bit converter typically employed in the field of PCM audio, however, the number of required unit conversion elements will rise up to as much as 65,535 (=2
16
−1). It will be understood that a D/A converter, if configured in accordance with the foregoing scheme, would require a much larger chip area than that required by the first scheme.
FIGS. 24 and 25
show tables each representing the relationship between respective levels and weight generating elements for expressing the levels in a sign-magnitude format. More specifically,
FIG. 24
shows a table relating each level to weight generating elements when the conventional multi-bit scheme in
FIG. 22
is used in the sign-magnitude format. As shown, two D/A converters for implementing the conversion in
FIG. 22
(each having two weight generating elements for each of x
1
, x
2
, x
4
, x
8
weights), and an additional x
1
weight generating element for expressing a sign bit are provided.
FIG. 25
in turn shows a table relating each level to unit weight generating elements when the conventional conversion scheme of
FIG. 23
is used in the sign-magnitude format, wherein two D/A converters for implementing the conversion of
FIG. 23
(each having 15 unit weight generating elements), and an additional unit weight generating element for expressing a sign bit (&agr;) are provided.
The prior art schemes described above imply the following shortcomings. Specifically, in the multi-bit scheme or the first conversion scheme, a relative linearity among all weighted conversion elements must be maintained in accordance with a resolution required for a D/A converter. To meet this requirement, a technique called “trimming” has been conventionally used for each of manufactured converters to make adjustments among conversion elements in order to enhance a relative manufacturing accuracy. This technique is extremely expensive for implementing a highly accurate D/A converter.
In the second conversion scheme, on the other hand, the total number of required unit converting elements (weight generating elements) exponentially increases and become immense, as a larger number of digital bits or a more accurate converter is implemented, as has been described in the aforementioned example. This means that a large chip area is required when a D/A converter is implemented in a semiconductor integrated circuit. Furthermore, large variations and so on in a variety of parameters in such a large chip area would increase the cost of a highly accurate D/A converter.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method and apparatus which are capable of realizing a digital-to-analog converter having a required accuracy in a smaller chip area.
It is another object of the present invention to provide a method and apparatus which are capable of implementing a required digital-to-analog converter at a lower cost.
It is a further object of the present invention to provide a highly accurate digital-to-analog converter at a lower price.
To achieve the above objects, the present invention provides, in a first aspect, a digital-to-analog converting method for converting a digital signal input comprising a first plural number of bits each having a different weight from a digital form to an analog form. The digital-to-analog converting method comprises the steps of (A) dividing the first number of bits into a second plural number of bit groups, and using one form of weight for each of the bit groups to convert each bit group into an analog form to generate the second number of bit group analog outputs; and (B) forming an analog signal output representative of the digital signal input from the second number of bit group analog outputs.
Also, in the present invention, the same type of digital-to-analog converting scheme may be used for the bit groups. In addition, the first number of bits may or may not include a sign bit.
Further, in the present invention, the step (A) may include the steps of (a) dividing the first number of bits into the second number of bit groups; (b) selecting the one form of weight for use in expressing each bit group of the second number of bit groups; (c) d
Brady W. James
Nguyen Khai
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Digital-to-analog converting method and digital-to-analog... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital-to-analog converting method and digital-to-analog..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital-to-analog converting method and digital-to-analog... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3013481