Digital-to-analog converter utilizing MOS transistor switching c

Details Digital-to-analog converter utilizing MOS transistor switching c Digital-to-analog converter utilizing MOS transistor switching c

1997-07-10

1999-04-13

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341172, H03M 166

Patent

active

058942815

ABSTRACT:
A digital-to-analog (D/A) converter provides superior linearity and reduces glitches by setting optimum dimensions for MOS transistors. The D/A converter is configured from a R-2R ladder circuit and a switching circuit. The R-2R ladder circuit consists of series resistors (R) and shunt resistors (2R), which are connected together at respective nodes corresponding to the bit stages. The switching circuit is configured from MOS transistors which are connected between reference potentials and the shunt resistors for each bit stage. The width/length (W/L) ratios of the MOS transistors are set such that the on-resistances of the transistors are sequentially increased by a factor of 2 in bit-stage descending order from the most significant bit (MSB) to the least significant bit (LSB) to maintain the linearity of the R-2R ladder circuit. Dummy gates are provided in parallel to the MOS transistors, except for the MOS transistors which correspond to the MSB, so that the same effective gate capacitance is set for each bit stage to provide uniform switching speed for each stage avoiding the occurrence of glitches.

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