Digital-to-analog converter using pseudo-random sequences...

Details Digital-to-analog converter using pseudo-random sequences... Digital-to-analog converter using pseudo-random sequences...

2002-03-06

2003-09-09

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S120000

Reexamination Certificate

active

06617990

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system and method which principally employs pseudo-random binary sequence with known bias to generate discrete analog voltage levels. More particularly, the present invention relates to an apparatus and method for providing respective discrete analog voltage levels by modulating a current source with a pseudo-random binary sequence, the output of which being integrated over time to develop discrete and precise analog voltage levels.
2. Description of the Related Art
Many times, electronic systems require static analog voltage levels for tuning and control of the various sub-systems. Moreover, it is acceptable for the required analog voltage levels to be chosen from a discrete set of levels. A very popular choice among electronic system designers for developing discrete voltage levels is through the use of analog to digital converters (DAC) where a digital binary word defines the discrete analog voltage level that is developed at the output of the device.
Many different techniques are employed to develop discrete analog levels from digital binary words. Among these are successive approximation registers (SARs), flash, and delta-sigma techniques. However, as can be appreciated by one skilled in the art, most of these DAC implementations are extremely sophisticated and complex, making them expensive and large in comparison to the cost and size of the other components in the system. In certain applications, therefore, it is desirable to have a very low complexity DAC to maintain a reasonable system cost. Moreover, it is desirable to have a DAC which is very amenable to integration into low-cost digital integrated circuits (ICs).
Accordingly, a need exists for a simple and inexpensive system and method for providing discrete analog voltage levels from within a digital IC employing a minimal complexity technique.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a system and method capable of providing an analog voltage level from a set of discrete levels selected by a digital control word and employing a low complexity technique for this function.
Another object of the present invention is to reduce system costs through the use of existing digital logic component resource on a circuit board, namely, application specific ICs (ASIC) or programmable logic devices (PLD), to provide the discrete analog voltage levels via the addition of a minimal number of external analog components.
These and other objects are substantially achieved by a system and method for providing discrete analog voltage levels. The system and method employs a digitally programmable pseudo-random sequence generator for generating finite length, repetitive, sequences of binary values, namely zeros and ones, which have varying degrees of bias. The bias of a binary sequence is defined by the formula
Bias=(None−Nzero)/(2*(None+Nzero))
Where “None” equals the total number of ones in the binary sequence and “Nzero” equals total number of zeros in the binary sequence.
From this formula, it is evident that a binary sequence with an equal number of zeros and ones has a bias of zero. Such a sequence is said to be perfectly balanced. If a sequence has more ones than zeros, then it will have a positive bias. In the same manner, sequences with more zeros than ones have a negative bias. Polarity keying a constant valued current source with the pseudo-random, repetitive sequence with know bias, and then integrating the output of the current source through a capacitor, transforms the bias of the binary sequence into an appropriately scaled precise discrete analog voltage. The current source modulation time interval, as well as the integrating capacitor value, shall be chosen so as to minimize undesirable fluctuations in the final output voltage. Specifically, the ratio of the constant current source value to the integrating capacitor in this example is at least one-twentieth the modulation time interval.


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