Digital to analog converter trim apparatus and method

Details Digital to analog converter trim apparatus and method Digital to analog converter trim apparatus and method

1999-09-30

2001-10-23

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Converter calibration or testing

Trimming control circuits

C341S144000

Reexamination Certificate

active

06307490

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to the trimming of a digital to analog converter to compensate for manufacturing variations in the value of the weighted analog output elements comprising the converter. More particularly, the present invention is directed to a method and apparatus for trimming a digitally programmable resistor.
BACKGROUND OF THE INVENTION
Digital-to-analog converters (DACs) produce an analog representation of a digital input code. The digital input code is typically directly input to a decoder which generates control signals to select a particular subset of a plurality of weighted analog elements that are summed to form an analog output. The configuration of weighted analog elements are commonly known as an analog network, since the analog network performs the function of converting digital control signals from the decoder into an analog output.
The analog elements of an electrical DAC is typically an electrical source such as a voltage or current source. Additionally, the analog elements of an electrical DAC may comprise a passive elements, such as resistors or capacitors configured as an analog network having an analog output that is an impedance. However, more generally a DAC includes a variety of control systems which convert a digital input code into an analog output. For example, a paint or ink color mixer that converts a digital input code into an analog colorant flow output is also a DAC. For example, the paint color mixer may have a plurality of electronically controlled valves coupling, in parallel, the colorant to a base paint. Each switchable valve may have a different maximum orifice size. A decoder may be used to select which of the valves is turned on as a function of the digital input code, thereby regulating the flow rate of a particular colorant added to the base paint. Generally speaking, a DAC may encompass any process or manufacturing method in which a digital input code may be converted into an analog output using a decoder and an analog network comprised of a plurality of switched analog network elements.
Although there are several different types of DAC, voltage converters are one of the most common types used to illustrate the general principles of DAC operation. The general principles of a DAC voltage converter are shown in
FIGS. 1A-1C
. In a DAC voltage converter, digital input codes are commonly converted to analog voltages by assigning a voltage weight, or a current weight, to each bit of the digital input code and summing the voltage or current weights of the entire code.
FIG. 1A
shows a generalized DAC voltage converter
100
, having a decoder logic
30
, switches
20
, analog network
40
, reference source
10
, and buffer amplifier
50
. Decoder
30
receives a digital input code
5
, typically in the form of a binary input word. The decoder
30
, sometimes also called a control logic or a demultiplexer, selectively turns on and off switches
20
coupled to a analog network
40
. Typically analog network
40
and decoder
30
are configured so that the analog output of analog network
40
is a linear function of the numeric value of a digital input code. However, the output of analog network
40
may also be a more complex mathematical function of a digital input code
5
. Analog network
40
is commonly comprised of a resistor network in which a plurality of resistors are coupled to the network by switches
20
so that control signals from decoder
30
determine the output of analog network
40
. However, analog network
40
may also be formed from a plurality of current or voltage sources. Analog network
40
is also sometimes called an analog output network, an attenuation network, or a decoding network. A reference source
10
, typically a voltage source, is used so that the analog network
40
attenuates the reference source
10
according to an attenuation factor which is a function of the conductive state of switches
20
. The output of the analog network
40
is typically coupled to a buffer amplifier
50
. The analog output of the analog network
40
is typically plotted as a function of the digital input code, with the plot being described as the transfer function or the transfer characteristic of the DAC.
FIG. 1B
is an illustrative prior art DAC voltage converter
110
with switches and resistors arranged in one common DAC voltage converter configuration. The analog network
40
and switches
20
are arranged as a parallel resistor network with each resistor connected by one switch between a reference voltage source
16
to the inverting node of an op-amp
18
. Each subsequent resistor has twice the resistance of the previous resistor, thereby reducing its on-current by a factor of two. A five bit digital input code determines the switch positions of the five corresponding switches. The total current, I, of DAC
110
entering the inverting node of op-amp
18
is the sum of the binary weighted currents. The voltage, V
out
can be expressed as: V
out
=R
f
V
ref
(b
1
/2R+b
2
/4R+b
3
/8R+b
4
/16R+b
5
/32R), where V
ref
is a reference voltage, R
f
is a feedback resistance 120, and b
i
is the i
th
bit value (zero or one). EQ. 1. This can also be expressed as: (R
F
/R V
ref
)B
in
, where B
in
=b
1
2
−1
+b
2
2
−2
+b
3
2
−3+b
4
2
−4
+b
5
2
−5
. EQ.2.
There are several figures of merit to describe the response of a DAC. One limit to the response of DAC
110
is determined by the number of input bits. A large number of bits may permit a more accurate representation of an analog signal by allowing an analog signal to be represented with smaller step increments. The least significant bit (LSB) defines the smallest possible change in the analog output voltage. The LSB for a linear DAC is typically defined as: 1 LSB=V
ref
/2
N
, where V
ref
is the reference voltage and N is the number of bits. The resolution is typically described in terms of the increment of the least significant bit (LSB), which is the smallest analog signal increment which can be represented by the DAC. For a linear DAC with equal step heights (i.e., linear transfer function), the resolution, R, is given by the mathematical expression: R=1/[2
N
−1], where N is the number of bits. The greater the number of bits, the greater the potential resolution. However, the accuracy of a linear DAC is a function of other variables besides the number of bits. Absolute accuracy describes how close the output is to its ideal, or target value. Absolute accuracy depends upon the reference voltage and resistor tolerance. Relative accuracy refers to how close each output level is to its ideal fraction of full scale output. Relative accuracy depends principally upon on the tolerance of the weighted resistors. If the individual resistors of the analog network depart significantly from their target values the steps in the transfer function may be larger or smaller than 1 LSB. A monotonic DAC is one that produces an increase in output for each successive digital input. In order for a DAC to be monotonic the error, or differential non-linearity, must be less than ±½ LSB at each output level, which imposes tolerance requirements on the individual resistors comprising the analog network. The differential non-linearity, DNL, of a DAC is commonly expressed mathematically by: DNL
n
=the actual increment height of transition n—the ideal increment height. Generally, a DAC must have less than ±½ LSB of DNL if it is to be N-bit accurate. The dynamic range, DR, of a DAC is commonly defined as the ratio of the largrest output signal over the smallest output signal, and for a conventional DAC is related to the resolution of the converter by the equation: DR=20 Log(full scale/LSB) dB. Other common figures of merit for a DAC include the offset, gain error (ideal slope—actual slope), and integral nonlinearity.
A drawback of the DAC converter
110
shown in
FIG. 1B
is that it's unsuitable for achieving

Affiliated with

Also associated with

Rating

Digital to analog converter trim apparatus and method does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital to analog converter trim apparatus and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital to analog converter trim apparatus and method will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2555329