Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder
Reexamination Certificate
2000-09-29
2002-06-11
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Differential encoder and/or decoder
C341S156000
Reexamination Certificate
active
06404369
ABSTRACT:
This invention relates generally to converting digital input signals to analog output signals. More particularly, this invention relates to enhancing the performance of a commercial digital-to-analog converter using a sigma-delta loop and other digital signal processing techniques, for use in automatic test equipment.
BACKGROUND OF THE INVENTION
A need commonly arises in automatic test equipment (ATE) to stimulate a device under test (DUT) with analog waveforms. In the conventional ATE paradigm, a test program prescribes analog waveforms to be applied to a DUT. A test system applies the waveforms, and monitors signals generated by the DUT in response to the waveforms. The test program passes or fails based upon whether the monitored signals from the DUT match expected, correct responses to a sufficient level of accuracy.
General-purpose ATE systems are preferably equipped for testing diverse types of devices that cover a wide range of frequencies. Conventional digital-to-analog converters (DACs) generally provide high accuracy over only limited frequency ranges, however. DACs that are accurate at high frequencies tend to be inaccurate at low frequencies, and DACs that are accurate at low frequencies tend to be inaccurate at high frequencies. These limitations have induced ATE developers to provide different circuit topologies for generating analog waveforms covering different frequency ranges. For example, an ATE system might employ one circuit topology for generating low frequency signals, and another circuit topology for generating higher frequency signals.
Developers have attempted to overcome these limitations in DAC performance by using simple, high-speed, low-resolution DACs driven by sigma-delta loops.
FIG. 1
shows an example of a DAC topology
100
employing a sigma-delta loop. As shown in
FIG. 1
, a DAC
116
is configured to generate an analog output signal from an 8-bit digital input signal. The DAC
116
is sampled at a fast enough rate to generate an output signal with sufficient fidelity (i.e., at least the Nyquist rate), and a low-pass filter
124
smoothes the output of the DAC
116
to reduce artifacts of sampling.
Despite the fact that the DAC has only 8 bits of resolution, the effective resolution of the circuit
100
far exceeds 8-bits, owing to the operation of the sigma-delta loop. Within the sigma-delta loop, a digital input signal, “Digital In”, having relatively high numeric resolution (e.g., 25 bits), is provided to an input of a summer
110
. The summer
110
subtracts a feedback signal from the digital input signal to produce an error signal E
S
. The error signal is then fed to a loop filter
112
. The loop filter helps to stabilize the sigma-delta feedback loop and generally integrates the error signal over time (e.g., it accumulates E
S
over different samples). A quantizer
114
then renders the output of the loop filter
112
as an 8-bit signal by simple truncation. At any instant in time, the error signal represents the difference between the digital input signal and the quantized signal being input to the DAC
116
. By operation of feedback, the sigma-delta loop tends to drive the error signal to zero, causing the 8-bit input to the DAC to precisely match—over time—the high resolution digital input signal. As a result, the output signal from the DAC
116
replicates the digital input signal, to an effective level of resolution much higher than the resolution of the DAC
116
.
Because the DAC
116
inherently has low resolution, it can be constructed simply to operate with relatively high accurately over a wide range of frequencies. Because it is combined with a sigma-delta loop, it can also achieve high effective resolution.
Despite these advantages, we have recognized that the DAC itself is still subject to errors that exceed the levels that are desired for automatic test equipment. These errors include, for example, DC errors, non-linearities, and transient errors. Although the sigma-delta loop greatly enhances the effective resolution of the DAC, it does necessarily improve the DAC's accuracy. Consequently, multiple DAC topologies are still required, each optimized for its own particular frequency range.
What is needed is a single topology for generating an analog output signal from a digital input signal, which can cover a broad range of frequencies with both high effective resolution and high accuracy.
SUMMARY OF THE INVENTION
With the foregoing background in mind, it is an object of the invention to generate accurate analog output signals from digital input signals, over a wide range of frequencies using a single circuit topology.
To achieve the foregoing object and other objectives and advantages, a circuit for converting a digital input signal to an analog output signal includes a DAC and a sigma-delta loop having a DAC model in its feedback loop. The sigma-delta loop compares a high resolution digital input signal with a feedback signal to generate an error signal, and a loop filter processes the error signal. The output of the loop filter is quantized, and the quantized signal is fed to the DAC. The quantized signal is also fed to the DAC model, which processes the quantized signal and produces the feedback signal. In response to stored behavioral information about the DAC, the DAC model adjusts the feedback signal to match expected values of the DAC in response to the quantized signal. The DAC model thus effectively emulates the DAC, including expected errors introduced by the DAC. Through the operation of feedback, the expected errors are substantially reduced and accuracy is improved.
REFERENCES:
patent: 4996530 (1991-02-01), Hilton
patent: 5027119 (1991-06-01), Toyomaki
patent: 6271781 (2001-08-01), Pellon
patent: 6271782 (2001-08-01), Steensgaard-Madsen
Rubenstein Bruce D.
Teradyne, Inc.
Wamsley Patrick
LandOfFree
Digital to analog converter employing sigma-delta loop and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Digital to analog converter employing sigma-delta loop and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital to analog converter employing sigma-delta loop and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2908170