Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
1999-02-23
2001-03-06
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S126000
Reexamination Certificate
active
06198418
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a digital-to-analog converter and, more particularly, to a digital-to-analog converter accurately testable, a semiconductor integrated circuit device with the digital-to-analog converter and a method for testing the digital-to-analog converter.
DESCRIPTION OF THE RELATED ART
Various kinds of semiconductor integrated circuit device have been developed. A kind of semiconductor integrated circuit device includes digital circuits and a digital-to-analog converter. The digital circuits process pieces of data for producing an output digital signal, and the digital-to-analog converter converts the output digital signal to an analog output signal. The analog output signal is supplied from the semiconductor integrated circuit device. This feature is desirable for an audio signal or a video signal.
The manufacturer tests products before delivery to a customer. The semiconductor integrated circuit device with the digital circuits and the digital-to-analog converter is tested by using a digital tester for both of the digital circuits and the digital-to-analog converter, a digital tester for the digital circuits and an analog tester for the digital-to-analog converter, a tester for an analog-and-digital hybrid circuit or a built-in tester.
If the manufacturer uses the digital tester for the semiconductor integrated circuit device, the digital tester accurately tests the digital circuits. However, the digital tester is less reliable in the test for the digital-to-analog converter, because the voltage resolution is rough. On the other hand, when the digital tester and the analog tester are used for the semiconductor integrated circuit device, the test is so expensive, because the manufacturer requires both digital and analog testers and two kinds of test programs.
The tester for an analog-and-digital hybrid circuit is sold at high price, and the test is also expensive. The built-in tester requires additional area on the semiconductor chip, and a large semiconductor chip is required. Moreover, the built-in tester is not removed from the semiconductor integrated circuit device after the test. The built-in tester has undesirable influence on the digital-to-analog converter, and deteriorates the digital-to-analog converter. Thus, there is a trade-off between those testing methods.
FIG. 1
illustrates a typical example of the digital-to-analog converter. The prior art digital-to-analog converter includes a ladder-type resistor network
1
, pairs of bipolar transistors
2
/
3
/
4
/
5
connected in parallel to the ladder-type resistor network
1
and constant current sources
6
/
7
/
8
/
9
connected between the pairs of resistors bipolar transistors
2
/
3
/
4
/
5
and a ground line GND. Two kinds of resistor elements, one of which is twice larger in resistance than the other, are incorporated in the ladder-type resistor network
1
, and the ladder-type resistor network
1
includes resistor elements R
1
/ R
2
/ R
3
/ R
4
connected at first ends thereof to a power supply line VDD and resistor elements R
5
/ R
6
/ R
7
connected between the second ends of the resistor elements R
1
/ R
2
/ R
3
/ R
4
. In this instance, the resistor element R
2
/ R
3
/ R
4
is twice larger in resistance than the resistor R
1
/ R
5
/ R
6
/ R
7
. The second end of the resistor element R
4
is connected to an output node N
1
and a test node N
2
. The output node N
1
is connected to another electric circuit integrated on the same semiconductor chip, and the test node N
2
is connected to a test pin (not shown).
The pairs of bipolar transistors
2
to
5
have first n-p-n bipolar transistors
2
a
/
3
a
/
4
a
/
5
a
and second n-p-n bipolar transistors
2
b
/
3
b
/
4
b
/
5
b.
The collector nodes of the first n-p-n bipolar transistors are connected to the power voltage line VDD, and the second ends of the resistor elements R
1
/ R
2
/ R
3
/ R
4
are respectively connected to the collector nodes of the second n-p-n bipolar transistors
2
b
/
3
b
/
4
b
/
5
b
. The common emitter nodes of the first/ second n-p-n bipolar transistors
2
a
/
2
b
,
3
a
/
3
b
,
4
a
/
4
b
and
5
a/
5
b
are connected to the constant current sources
6
/
7
/
8
/
9
, respectively. Data input nodes IN
1
/ IN
2
/ IN
3
/ IN
4
are respectively connected to the base nodes of the first n-p-n bipolar transistors
2
a
/
3
a
/
4
a
/
5
a,
and reference node REF is connected to the base nodes of the second n-p-n bipolar transistors
2
b
/
3
b
/
4
b
/
5
b
. Constant reference voltage Vref is applied from the reference node REF to the base nodes of the second n-p-n bipolar transistors
2
b
/
3
b
/
4
b
/
5
b.
A digital input signal is applied to the data input nodes IN
1
/ IN
2
/ IN
3
/ IN
4
, and the digital bits of the digital input signal are changed between a high level and a low level. In this instance, the high level is 2.4 volts, and the low level is 2.1 volts. The reference voltage Vref is regulated to an intermediate level between the high level and the low level, and is 2.1 volts in this instance.
The prior art digital-to-analog converter behaves as follows. Either first or second n-p-n bipolar transistor
2
a
,
3
a
,
4
a
,
5
a/
2
b
,
3
b
,
4
b
,
5
b
turns on, and the other n-p-n bipolar transistor turns off. If the digital bit of the high level is applied to the data input node IN
1
, the first n-p-n bipolar transistor
2
a
turns on, and the second n-p-n bipolar transistor
2
b
turns off. On the contrary, if the digital bit at the data input node IN
1
is in the low level, the first n-p-n bipolar transistor
2
a
turns off; and the second n-p-n bipolar transistor
2
b
turns on. In this way, each pair of bipolar transistors
2
/
3
/
4
/
5
provides a current path in either first or second n-p-n bipolar transistor.
When the first n-p-n bipolar transistor
2
a
/
3
a
/
4
a
/
5
a
turns on, electric current flows from the power voltage line VDD through the associated constant current source
6
/
7
/
8
/
9
, and any electric current does not flow through the ladder-type resistor network
1
. On the contrary, when the second n-p-n type bipolar transistor
2
b
/
3
b
/
4
b
/
5
b
turns on, the electric current flows from the power supply line VDD through the ladder-type resistor network
1
to the associated constant current source
6
/
7
/
8
/
9
.
The digital bits cause the pairs of bipolar transistors
2
/
3
/
4
/
5
to provide the current paths through the first n-p-n bipolar transistors
2
a
/
3
a
/
4
a
/
5
a
or the second n-p-n bipolar transistors
2
b
/
3
b
/
4
b
/
5
b
, and the total amount of electric current is varied together with the values of the digital input signal. The ladder-type resistor network
1
varies the potential level at the output/ test nodes N
1
/ N
2
depending upon the total amount of current, and an analog output voltage signal is taken out from the output node N
1
and the test node N
2
. Thus, the ladder-type resistor network
1
determines the resolution of the analog output voltage signal.
A standard digital tester has a resolution lower than the resolution of the latter-type resistor network
1
, and it is impossible to accurately examine the prior art analog-to-digital converter on the basis of the analog output voltage signal. For this reason, the manufacturer has to prepare a high-precision digital tester, an analog-tester or an analog-and-digital hybrid tester, and these testers are expensive.
If the prior art digital-to-analog converter is integrated on a semiconductor chip together with digital circuits, the digital circuits are undesirable noise sources to the prior art digital-to-analog converter, and the analog output voltage signal is sensitive to the noise. The manufacturer needs to carefully design the layout on the semiconductor chip and signal lines therebetween. Even though the manufacturer carefully designs the semiconductor integrated circuit device, it is impossible to perfectly eliminate undesirable influences of the digital circuits from the integrated circuit.
Another prior art di
Jeanglaude Jean Bruner
NEC Corporation
Tokar Michael
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