Digital-to-analog converter

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

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Details

C341S144000

Reexamination Certificate

active

06683549

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital-to-analog converter, a current source and a differential amplifier. More particularly, the present invention relates to a current-driven digital-to-analog converter, as well as a current source and a differential amplifier which are preferably used in the digital-to-analog converter.
2. Description of the Related Art
A typical example of a conventional current-driven digital-to-analog converter (hereinafter also referred to as a D/A converter) is a current cell matrix D/A converter. The current cell matrix D/A converter is well described in
Analog Integrated Circuit Design
written by David Johns, pp. 477-478, and therefore is not described in detail here.
FIG. 9
shows an example circuit structure of the current cell matrix D/A converter. This D/A converter includes current cells arranged in a matrix as shown at the right of
FIG. 9
, and each of the current cells (corresponding to one bit in a digital code) has a structure shown at the left of FIG.
9
.
The current cell matrix D/A converter converts values of digital codes to amounts of electric current, and is characterized in that variation among output currents is small in relation to variation among the characteristic of metal oxide semiconductor field-effect transistor (MOSFET) devices forming the D/A converter. Therefore, this type of D/A converter is widely recognized as one which performs highly accurate conversion.
However, in the current cell matrix D/A converter such as that described above, the number of current cells required to form the D/A converter exponentially increases as the number of bits in a digital code to be converted by the D/A converter increases. Therefore, there has been a problem in that, when the D/A converter is adapted for use with digital codes having a multi-bit structure, the size of a module thereof becomes large. This problem is particularly serious when the D/A converter is contained in a chip as a semiconductor integrated circuit, since an area for the D/A converter within the chip is limited.
SUMMARY OF THE INVENTION
In order to solve the above-described problem, the present invention provides a digital-to-analog converter which can be adapted for use with multi-bit digital codes without significantly increasing the size of a module thereof, as well as a current source and a differential amplifier, which are preferably used in the digital-to-analog converter.
In order to accomplish these objects, a first aspect of the present invention is a current-driven digital-to-analog converter comprising: a constant current source for supplying a current corresponding to the least significant bit in a digital code to be converted into an analog signal; at least one resistor for generating at least one voltage corresponding to at least one bit other than the least significant bit in the digital code; at least one field-effect transistor including at least one control terminal, to which the voltage generated by the resistor is applied, and permitting passage of at least one current corresponding to the bit other than the least significant bit in the digital code; a current source for providing, together with the resistor, the voltage applied to a control terminal of the field-effect transistor, which voltage makes the field-effect transistor operate in a sub-threshold region and also makes the field-effect transistor permit passage of the current corresponding to the bit, to which the field-effect transistor corresponds; and a generator for generating the analog signal based on the current passing through the field-effect transistor and the current supplied by the constant current source.
If there are two or more bits other than the least significant bit (LSB) in the digital code, the resistors are required to generate voltages having mutually different values which respectively correspond to the two or more bits, and the field-effect transistors are required to permit passage of currents of mutually different amounts which also respectively correspond to the two or more bits. Therefore, the required number of the resistors and the field-effect transistors is determined according to the number of the bits other than the LSB, and each of the voltages having mutually different values respectively generated by the different resistors is applied to the control terminal of one of the field-effect transistors.
The field-effect transistors include MOSFETs, high-electron mobility transistors (HEMTs), or the like. The control terminals correspond to gate terminals of the field-effect transistors.
It should be noted that the generator in the present invention can generate an analog signal by, for example, validating only the currents which are permitted to pass through the field-effect transistors corresponding to high-level bits among the bits other than the LSB in the digital code; with respect to the LSB, validating the current supplied by the constant current source only when the LSB is a high-level bit; and then generating the analog signal so that it has a value which is equal to a sum of the amounts of the valid currents. Whether the currents are validated or not is controlled by using switching elements (such as field-effect transistors) which can permit or not permit passage of the respective currents through the respective field-effect transistors. The switching elements are then controlled so as to permit passage of the current only when it is validated. Alternatively, whether the currents are validated or not may be determined by a central processing unit (CPU) on the basis of the digital code.
That is, the present invention utilizes the fact that weights of bits in a digital code differ from each other by a power of two such that a weight of the first bit is 2
1
, a weight of the second bit is 2
2
, and so on, and that the sub-threshold region of the field-effect transistor is, as shown in
FIG. 2
, a region where the logarithm of a drain current changes linearly with respect to linear change of a gate-source voltage. By setting the voltages applied to the control terminals (gate terminals) of the field-effect transistors so as to make the field-effect transistors operate in the sub-threshold region and also to make the field-effect transistors permit passage of the currents corresponding to the bits, to which the field-effect transistors respectively correspond, the currents, each having one of the amounts corresponding to one of the bits other than the LSB in the digital code, can each be respectively obtained through one of the field-effect transistors and one of the resistors. It should be noted that, since the current corresponding to the LSB in the digital code is supplied by the constant current source, the relevant current is always stable.
Therefore, the digital-to-analog converter of the present invention can be adapted for use with multi-bit digital codes by increasing the number of the field-effect transistors, which contribute to digital-to-analog conversion, so as to correspond to the number of the bits in the digital code, without significantly increasing the size of a module thereof, particularly in comparison with the case of the above-described current cell matrix D/A converter.
As described above, in the digital-to-analog converter according to the first aspect of the present invention, the constant current source supplies the current corresponding to the LSB in the digital code to be converted into an analog signal, the resistors generate the voltages corresponding to the bits other than the LSB in the digital code, and as the generated voltages are applied to the control terminals of the field-effect transistors, the field-effect transistors permit passage of the currents corresponding to the bits other than the LSB in the digital code. Here, the current source provides, through the resistors, the voltages to be applied to the control terminals of the field-effect transistors, which voltages can make the respectively corresponding field-effect transistors operate in the sub-th

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