Digital to analog converter

Details Digital to analog converter Digital to analog converter

2000-10-27

2002-07-30

Wamsley, Patrick (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S118000

Reexamination Certificate

active

06426715

ABSTRACT:

This invention relates to a digital to analog converter for converting a multibit digital input signal into an analog output signal, the converter comprising a set of substantially equal conversion elements of one polarity and conversion element selection logic for selecting, in response to the multibit digital input signal, from said set of conversion elements a number of signal-conversion elements for connection to an output terminal, the selection logic being adapted to perform a dynamic element matching algorithm. A digital to analog converter of this kind is e.g. known from the article: “Linearity Enhancement of Multibit Delta Sigma A/D and D/A Converters Using Data Weighted Averaging” by R. T. Baird and T. S. Fiez in IEEE Transactions on Circuits and Systems-II: analog and digital signal processing, Vol. 42, No. 12, pp. 753-762, December 1995.
In audio and instrumentation applications, where low-frequency, high-resolution and high-linearity conversion is required, oversampling and noise-shaping AID and D/A converters have displaced the traditional architectures. In these converters, single-bit A/D and D/A converters can be used which inherently have an extremely good linearity. This inherent linearity makes these converters very suitable for implementation in modern IC processes, as these processes generally tend to be optimized for high-frequency devices, but have relatively large component variations and matching tolerances.
Although the quantization noise that is produced by single-bit converters is placed outside the frequency band of interest by these oversampling and noise-shaping converters, the total amount of quantization noise is very large, as only one bit is used in the conversion. In converters where an extremely high-resolution conversion is required, such as geoseismic measurements or high-resolution audio, the quantization noise produced by these single-bit converters can be too large. Also, in converters for very large bandwidths, such as converters for video signals, the quantization noise produced by these single-bit converters can be too large, as the oversampling ratio in this type of converter is limited, due to the relatively large bandwidth of the input signal. Moreover, very often the out-of-band quantization noise has to be removed before the signal can be processed by the following electronic circuitry or actuator. When the amount of out-of-band quantization noise is very large, the analog filters that are required for this operation can be very power consuming and very expensive in silicon area.
In these cases, the use of multibit converters is preferred over single-bit converters. The quantization-noise level of the multibit quantizers is inherently lower than that of single-bit quantizers (the theoretical signal to noise ratio of the system improves by approximately 6 dB per bit). Moreover, multibit converters also have the advantage of being less sensitive to sample-clock jitter and intersymbol interference.
The improvement of the dynamic range of multibit converters however only comes at the cost of severe linearity problems. When the value of the conversion elements is not exactly equal, the quantization levels are not exactly equidistant, the converter is nonlinear and severe harmonic distortion in the output signal is generated.
It is well known in the art, e.g. from the U.S. Pat. Nos. 3,982,172 and 4.703.310 of R. J. van de Plassche, to improve the linearity of multibit converters by techniques of dynamic element matching. These techniques do not rely on analog accuracies and are therefore often preferred in modern IC processes. Although, of course, for converting a certain value of the digital input signal, the corresponding number of conversion elements is selected, the technique of dynamic element matching seeks to avoid that for each conversion, the same conversion elements are selected. Therefore dynamic element matching decorrelates the mismatch errors of the conversion elements from the input signal, thereby reducing non-linear distortion, i.e. the generation of higher harmonics in the analog output signal. Some special kinds of dynamic element matching do not only decorrelate the mismatch errors from the input signal, but additionally “shape” the noise, caused by the inequalities of the conversion elements, out of the frequency band of interest. A simple and preferred method of dynamic element matching, belonging to this latter category, is the Data Weighted Averaging (DWA) algorithm, which is described in the above referenced article. In this algorithm, for each conversion the next K unit elements are used, K being the number of elements to be selected. In this way, the error that is caused by the mismatch is averaged as fast as possible, and thus the mismatch error becomes a high-frequency error by first-order shaping.
When both the converter's quantization noise is reduced by the use of multibit input signal and the linearity errors are minimized by the use of dynamic element matching, the noise of the electronic components is often dominant. The present invention has for its object to provide a digital to analog converter which is, compared with the above referenced article, in this respect improved and the digital to analog converter of the present invention is therefore characterized in that the converter further comprises a second set of substantially equal opposite-polarity conversion elements for output-signal excursions which are opposite to the output-signal excursions obtained by the first mentioned set of conversion elements and second conversion-element selection logic for selecting, in response to the multibit digital input signal, from said second set of conversion elements a second number of signal-conversion elements for connection to the said output terminal, the second selection logic being also adapted to perform a dynamic element matching algorithm. The noise reduction of this converter is mainly based on the following: when the converter has to deliver a value close to “zero”, no or only few elements are selected in each of the two sets to deliver the analog output. As the contribution of the selected elements is relatively small, as compared to the full-scale output signal, the noise at the output of this converter can be much smaller. Therefore, the dynamic range of such a converter can be much larger than that of many other converters.
It may be observed, that dual-set digital to analog converters are known per se e.g. from U.S. Pat. No. 5,689,259. The digital to analog converter shown in this document does, however, neither show the use of a dynamic element matching algorithm, nor the use of substantially equal selectable conversion elements.
With the above described digital to analog converter, with two sets of conversion elements, one for the positive signal excursions and one for the negative signal excursions, the shaping of the linearity errors by the dynamic element matching algorithm appears to be less efficient than with a converter of only one set of conversion elements for both the positive and the negative signal excursions. This is caused by the fact that the dynamic element matching algorithm that is applied to the “positive” set of elements stops when a negative signal excursion is made, because no elements of this set of elements are selected for contributing to the output signal and equally that the dynamic element matching algorithm for the “negative” set of elements stops when a positive signal excursion is made. When a dynamic element matching algorithm temporarily stops, a larger period of time elapses between the mismatch errors, with the result that the algorithm can no longer shape the mismatch errors to higher frequencies and that low-frequency errors now appear as a noisy signal within the frequency band of interest. It is a further object of the invention to avoid these low-frequency errors in dual conversion-set converters and the digital to analog converter of the present invention may be further characterized in that the first mentioned selection logic additionally s

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