Digital-to-analog cell having reduced power consumption and...

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Details

C341S153000, C341S136000, C323S316000, C327S436000

Reexamination Certificate

active

06509855

ABSTRACT:

BACKGROUND
Conventional digital-to-analog converters may include a digital-to-analog cell that receives a digital input signal, such as a voltage potential, and provides an output signal, such as a current flow. Simply speaking, a digital-to-analog cell may include an analog circuit that mirrors a reference current source to provide the output current. A switching circuit may be used to direct the output current flow depending on the logical value of the input signal.
One drawback to conventional digital-to-analog cells is that the switching circuit typically provides the output current directly from the power supply for at least one of the two input values. Consequently, the digital-to-analog cell may consume a large amount of power for half of the input values.
Another drawback of some conventional digital-to-analog circuits is that they may be referenced to the power supply voltage potential. As manufacturing techniques improve, it may be possible to manufacture transistors with smaller geometries, which may allow the power supply voltage potential to be reduced as well. However, since digital-to-analog cells are typically referenced to the power supply voltage potential, they may be difficult scale to take advantage of the decreasing geometry sizes. Consequently, at least a significant portion of conventional digital-to-analog cells may have to be redesigned before they may take advantage of improved manufacturing techniques. Thus, there is a continuing need for integrated circuits that have improved digital-to-analog cells that consume less power and that may be scaled to take advantage of improvements in manufacturing technology.


REFERENCES:
patent: 4677323 (1987-06-01), Marsh
patent: 5598095 (1997-01-01), Schnaitter
patent: 5844511 (1998-12-01), Izumikawa
patent: 5917341 (1999-06-01), Suder
patent: 5917360 (1999-06-01), Yasutake
Allen et al.,CMOS Analog Circuit Design, 1987 Oxford University Press, Inc. ISBN 0-19-510720-9, pp. 97 and 102.

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