Digital timing recovery loop for GMSK demodulators

Details Digital timing recovery loop for GMSK demodulators Digital timing recovery loop for GMSK demodulators

1999-05-07

2002-06-25

Tse, Young T. (Department: 2634)

Pulse or digital communications

Receivers

Angle modulation

C375S326000, C329S300000, C329S304000

Reexamination Certificate

active

06411661

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to the field of communication systems. More particularly, the present invention relates to timing recovery loops used in Gaussian Minimum Shift Keying (GMSK) receivers for recovering transmitted data.
BACKGROUND OF THE INVENTION
Communication systems communicate signals using a variety of modulation methods. One such modulation method is Gaussian Minimum Shift Keying (GMSK). GMSK is a form of continuous phase modulation method exhibiting compact spectral occupancy and a constant envelope, thus making it compatible with a non-linear power amplifier operation without the concomitant spectral re-growth associated with non-constant envelope signals. As demands for channel capacity increase, the need for bandwidth-power efficiency with constant envelope modulation techniques is also increased. The GMSK modulation technique satisfies these two requirements. The GMSK modulation technique exhibits a constant envelope waveform with the occupied bandwidth determined by the BT product, where B denotes the 3 dB bandwidth of the baseband Gaussian filter, and T is the bit duration. These attributes render GMSK an attractive modulation scheme in communication systems where only a limited system bandwidth is available.
A formatted data signal, such as a non-return to zero (NRZ) data stream of a series of respective data pulses, is passed through a Gaussian filter and an integrator providing a continuous output for modulating the phase of the carrier signal. The output of the Gaussian filter is a series of Gaussian filter pulse responses that are passed through the integrator providing a continuous voltage signal to a phase modulator that phase modulates the carrier signal. Each of the predetermined number of prior data pulses contribute a signal component to the current output of the integrator at the current bit time. That is, the continuous output of the integrator at each bit time depends upon a predetermined number of prior data bits, that is, a predetermined number of prior data pulses that are inputted into the Gaussian filter and integrator, and hence the Gaussian filter and integrator have a memory represented by signal components from the prior data bits, or data pulses. This memory is known as intersymbol interference where a first data pulse is a symbol communicated as a signal having pulse filter response components lying within the time duration of the signal of a subsequent symbol of a subsequent data pulse.
In typical implementations, the NRZ data stream is a series of pulses having +/−1V voltage levels. Each +1V or −1V pulse contributes to a phase response that is accumulated over time. The Gaussian filter provides pulse responses to the +1V or −1V data pulses that are accumulated through the integrator. Each of the pulse responses is integrated to provide a respective phase shift of +/−&pgr;/2. The integrator provides a modulo 2&pgr; accumulated phase response of all of the +/−&pgr;/2 phase responses respectively for each Gaussian filter pulse response. The integrator output is hence an accumulated phase response from a predetermined number of prior data bits. The resulting modulo &pgr;/2 phase response is hence a continuous accumulated phase output that is a function of the prior predetermined number of data bits and resulting Gaussian filter pulse responses. The continuous accumulated phase integrator output is inputted into the phase modulator modulating the carrier signal for providing a transmitted GMSK phase modulated carrier signal where the modulated phase is the accumulated phase reduced modulo 2&pgr; representing all the previous data bits.
The GMSK phase modulated signal arrives at a receiver arbitrarily in time creating a carrier phase between the arrived carrier signal and a locally generated carrier signal used for coherent demodulation reception. Upon reception of the GMSK signal, the carrier phase must be firstly determined for demodulating the GMSK signal so that the resulting accumulated data phase can be determined to then enable reconstruction of the data stream at the receiver. Hence, determining the carrier phase is essential in coherent communications so that the carrier phase modulated by the data stream can be determined to recover the data. The current phase is the sum of a carrier phase and the accumulated data phase of the previous data channel bits.
The GMSK receiver includes a GMSK carrier tracking loop for tracking the carrier phase and frequency estimates for demodulating the GMSK carrier signal into the GMSK baseband signal. After carrier synchronization and demodulation, the GMSK carrier tracking loop provides a replica of the Gaussian filter response that is a time varying analog signal upon which the Gaussian time recovery loop operates to derive a timing signal for bit synchronization for reconstructing the data sequence.
Various forms of GMSK timing recovery loops using squaring loops have been described. GMSK Carrier and timing recovery techniques have used squaring or costas loops. GMSK modulators and demodulators operate at high bit signal to noise ratios (BSNR), that is, with BSNR greater than zero Db, and with Gaussian bandwidth-bit time duration products BT greater than 0.25. The GMSK demodulator has been used for carrier and bit timing synchronization under these conditions. For small values of BT and low BSNR, the carrier and bit synchronization for GMSK demodulators become extremely difficult. The loss due to squaring and self-noise due to intersymbol interference is unavoidable degrading system performance. Digital GMSK tracking loops do not perform very well in the presence of non-random data patterns where the discrete components for carrier and clock recovery may vanish. For data-derived timing recovery techniques which do not utilize squaring loops, the performance of the bit synchronizing tracking transition loops depends heavily on the BSNR and BT. For low BSNR and small BT, timing recovery becomes extremely difficult because of intersymbol interference and non-distinguishable bit transitions. For recovery of the carrier and bit timing information, the performance degradation, in terms of the carrier phase and timing jitter, associated with the existing schemes, are quite high at very low BSNR and small values of BT.
The GMSK carrier tracking loop has employed reverse modulation techniques for recovering the carrier phase coherently. Reverse modulation technique for tracking the GMSK signal with BT=0.3 use a phase locked loop with second order loop filter employed by the reverse modulator. The received signal R(t) is received by a reverse modulator in the GMSK carrier tracking loop to create the carrier tone fc that is acquired and tracked by the phase lock loop. The GMSK carrier tracking loop tracks the carrier tone fc to create a carrier reference that is generated by the phase lock loop for carrier demodulation of the received signal R(t), as is well known in the art. The reverse modulation techniques are used to avoid squaring loss associated with the costas or squaring loop.
For binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), and M-ary phase shift keying, the communication signal is a square wave in nature and digital tracking transition loops (DTTL) are used for bit synchronization. That is, the DTTL is designed to track the baseband square waves of demodulated received signals. The DTTL performs optimally when the square wave signals are received in the presence of the additive white Gaussian noise. Digital transition tracking loops as part of a GMSK timing recover loop have been applied to demodulated GMSK received signals that are highly distorted square wave signals. The GMSK timing recovery loop operates upon the demodulated received GMSK signal using forms of a squaring loop or frequency doubler followed by a phase locked loop for bit timing recovery. The timing clock for timing recovery in the GMSK timing recovery loop is created by squaring the received demodulated signal, and th

Affiliated with

Also associated with

Rating

Digital timing recovery loop for GMSK demodulators does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital timing recovery loop for GMSK demodulators, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital timing recovery loop for GMSK demodulators will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2914706