1978-11-30
1980-09-16
Atkinson, Charles E.
Excavating
324 73R, G06F 1100, G01R 3128
Patent
active
042225140
ABSTRACT:
An apparatus for testing digital logic circuits without a computer and associated software employs a pseudorandom stream of input data to produce an unstructured output data stream which is analyzed by an efficient data collector and analyzer. Test signal generation is implemented by a pseudorandom number generator and a pseudorandom clock/reset generator while the resulting test data at the output terminals of the device under test is analyzed by a cycle redundancy code checker. Fault localization is realized, with selectable localization and manual probe modes and circuitry is provided for an efficient self-test mode.
REFERENCES:
patent: 3651315 (1972-03-01), Collins
patent: 3832535 (1974-08-01), DeVito
patent: 3924181 (1975-12-01), Alderson
patent: 3976864 (1976-08-01), Gordon et al.
patent: 4070565 (1978-01-01), Borrelli
patent: 4125763 (1978-11-01), Drabing et al.
Atkinson Charles E.
Levine Seymour
Sperry Corporation
Terry Howard P.
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