Digital telecommunications switches network with in-built fault

Details Digital telecommunications switches network with in-built fault Digital telecommunications switches network with in-built fault

1980-08-07

1983-07-12

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

370 63, H04J 314, H04Q 1104

Patent

active

043934900

ABSTRACT:
In modern digital telecommunications switching networks the switch block may be a duplicated plane time-space-time arrangement in which each time switch stage and each space switch stage is controlled by control stores. Each control store is cross-office slot ordered and is arranged to be loaded by the central control with the identity of the connection required for the relevant cross-office slot. At each busy cross-office slot in a time switch control store a 12 bit address word is retrieved. Ten bits are used to define the connection while the two remaining bits act as a busy bit and a parity bit. Each space switch control store contains in cross-office slot order eight bit address words (6 bits address plus busy and parity bits). The busy bits are used when interrogating the trunking for free paths and they are also used to control the application of idle codes to free slots in the speech path. The parity bits within the control stores are used to initiate pattern insertion on the speech highways. The detection of "bad parity" causes characteristic patterns to replace an erroneously accessed samples at the time or space switch and the replaced sample will be intercepted at the transmit digital line termination unit, which will be biased to choose the sample from the other plane of the switch block. The inserted pattern also identifies the trunking element to which the erroneous address has been applied so that the DLT is able to indicate the faulty control store.

REFERENCES:
patent: 3937935 (1976-02-01), Le Pabic
patent: 4163122 (1979-07-01), de Goede
patent: 4300230 (1981-11-01), Philip et al.

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