Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Cathode ray
Reexamination Certificate
2000-08-08
2002-10-01
Le, N. (Department: 2858)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
Cathode ray
Reexamination Certificate
active
06459256
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a digital storage oscilloscope.
The acquisition section of a conventional storage oscilloscope includes several components that are relatively expensive and are highly adapted to the environment in which they are used. The specialized nature of the components makes it difficult to expand the capabilities of the acquisition section, especially with regard to engineering cost. For example, the stream of digital data words generated by the analog-to-digital converter, perhaps operating at a rate as high as 1 Gs/s, cannot be loaded into successive addresses of the acquisition memory as a single stream because of the high sample rate, but must be supplied to the memory through a demultiplexer. The demultiplexer loads a block of data words into an accumulation register and the block of data words is then loaded into the acquisition memory in a single write operation. By proceeding in this way, the write operation occurs at a frequency that is substantially less than the sample rate. The demultiplexer itself generates the address words that are used for writing the data words into the memories.
The blocks of data words are written into the acquisition memory in a circular manner until the demultiplexer receives a trigger to initiate termination of the acquisition. After the demultiplexer receives a trigger, the demultiplexer continues to write data words into the acquisition memory until a prescribed quantity of post-trigger data has been acquired and at that point the demultiplexer ceases writing data into the acquisition memory. An external processor reads the waveform data from the acquisition memory as the next step of the operation of generating a waveform display.
After the data has been read out, the acquisition memory can be armed again and data is written into the memory until the next trigger is received.
The length of the waveform record that can be acquired depends on the number of address lines that the demultiplexer can control. This results in the maximum record length being smaller than is desired for some applications. The maximum record length cannot be increased, within this conventional architecture, without redesigning the demultiplexer, which is a difficult and expensive proposition.
SUMMARY OF THE INVENTION
According to a first aspect of the present invention there is provided a digital storage oscilloscope which includes first and second memory modules each including a data input section for receiving an input stream of digital data words and generating a sequence of address words, an acquisition memory which is addressed utilizing the address words for storing the data words, and a trigger input section for receiving a discrete input trigger and supplying the discrete input trigger to the data input section for initiating termination of an acquisition, and wherein the data input section of the first memory module passes the stream of digital data words to the data input section of the second memory module and supplies a discrete trigger to the trigger input section of the second memory module.
According to a second aspect of the present invention there is provided a memory module for a digital storage oscilloscope, the memory module including a data input section for receiving an input stream of digital data words and generating a sequence of address words, an acquisition memory which is addressed utilizing the address words generated by the data input section for storing the data words, a trigger input section for receiving a discrete input trigger and supplying the discrete input trigger to the data input section for initiating termination of an acquisition, and a trigger output section for generating a discrete output trigger when the acquisition memory is full.
REFERENCES:
patent: 5877621 (1999-03-01), Beyers et al.
patent: 5914592 (1999-06-01), Saito
patent: 5978742 (1999-11-01), Pickerd
Kerveros James
Le N.
Lenihan Thomas F.
Smith-Hill John
Tektronix Inc.
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