Digital signal voting scheme

Details Digital signal voting scheme Digital signal voting scheme

2006-12-26

2006-12-26

Deberadinis, Robert L. (Department: 2836)

Electrical transmission or interconnection systems

Plural supply circuits or sources

Substitute or emergency source

C307S085000

Reexamination Certificate

active

07154195

ABSTRACT:
A digital signal voting circuit (10) is described for each module in a modular uninterruptible power supply (UPS) in which a plurality of modules are connected in parallel. The voting circuit (10) includes a first comparator (14) for comparing a decision output signal of the voting circuit, and the cumulative effect of the decision output signals of the voting circuits in parallel modules, with a reference threshold signal (VREF). Comparator (14) generates a first comparison result signal when the decision output signal (D) is greater than the reference threshold signal (VREF). Logic element (12) has two inputs, one of which is fed with a control signal (A1) from the module and a second input which receives an output signal (A2) from the first comparator (14). When the output signal (A3) of logic element (12) is low, it will go high when either one of the input signals (A1or A2) goes high. Likewise, when the Output (A3) is high, it will go low when either one of the input signals (A1or A2) goes low, whichever is first. The voting circuit (10) also includes an avalanche detecting circuit (16) for detecting when an avalanche point is reached and generating a clear cut majority decision control signal at this point. By utilising an avalanche effects a definite majority decision can be effected as soon as more than 50% of the modules change state, thereby eliminating any jitter at the majority point. The digital signal voting scheme may be used in any multiple device system in which fail-safe operation by built-in redundancy is required.

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