Digital signal time-division multiplex apparatus

Details Digital signal time-division multiplex apparatus Digital signal time-division multiplex apparatus

1991-05-20

1993-09-14

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3701001, 361792, 361796, H04J 304, H04J 306

Patent

active

052456137

ABSTRACT:
In a digital signal time-division multiplex apparatus according to the present invention, digital signals transmitted through a plurality of channels are converted into low-order section frame signals in response to sync signals by low-order section frame processing boards provided for their respective channels. The low-order section frame processing boards are arranged in parallel on a mother board at regular intervals. The low-order section frame signals processed by the low-order section frame processing boards are supplied to a high-order section frame processing board and sequentially selected within one frame, thereby generating time-division multiplex signals. The sync signals are generated by a sync signal generating board and transmitted to a sync signal transmitting line formed on the mother board. The sync signal transmitting line is formed so as to transmit the sync signals in a direction in which the low-order section frame processing boards are arranged. The sync signals are supplied to the low-order section frame processing boards through the sync signal transmitting line in a bus line system. The low-order section frame signals generated from the low-order section frame processing boards are transmitted to a plurality of low-order section frame signal transmitting lines formed in the direction in which the sync signals are transmitted, and supplied to the high-order section frame processing board through the low-order section frame signal transmission lines.

REFERENCES:
patent: 3963301 (1976-06-01), Stark
patent: 4488293 (1984-12-01), Haussmann et al.
patent: 4792941 (1988-12-01), Yanosy, Jr. et al.
patent: 4881230 (1989-11-01), Clark et al.

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