Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal gain processing
Patent
1997-10-27
2000-04-18
Edun, Muhammad
Dynamic information storage or retrieval
Binary pulse train information signal
Binary signal gain processing
369 50, 369 48, G11B 700
Patent
active
060523506
ABSTRACT:
The present invention provides a digital signal reproduction circuit capable of controlling a transfer function of waveform equalization circuit so that a synchronous clock can be generated with an optimal transfer characteristic. The digital signal reproduction circuit 1 includes: a waveform equalization block for waveform-equalizing a regenerative signal; a binarization block 20 for binarizing the regenerative signal which has been waveform-equalized; a synchronous clock reproduction block 30 for generating a synchronous clock from the signal binarized; and a waveform equalization control block 40 for controlling a transfer function of the waveform equalization block 10 according to a jitter component between the synchronous clock and the binarized signal. The waveform equalization control block 40 is supplied with a phase difference signal between the binarized signal and the synchronous signal, so as to obtain an optimal value of the transfer function of the waveform equalization block 10 by using a microcomputer, for example. The transfer function is controlled so as to reduce the jitter component of the synchronous clock.
REFERENCES:
patent: 4005477 (1977-01-01), Ottesen
patent: 4615037 (1986-09-01), Adler
patent: 4813031 (1989-03-01), Bierhoff
Patent Abstracts of Japan, vol. 096, No. 011, Nov. 29, 1996 & JP 08 180589 A (Canon Inc), Jul. 12, 1996.
Patent Abstracts of Japan, vol. 014, No. 354 (E-0958), Jul. 31, 1990 & JP 02 122734 A (Hitachi Ltd), May 10, 1990.
Edun Muhammad
Frommer William S.
Sony Corporation
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