Digital signal repeater including means for controlling a transm

Details Digital signal repeater including means for controlling a transm Digital signal repeater including means for controlling a transm

1985-08-16

1987-07-14

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

178 70R, 375106, H04B 717

Patent

active

046807721

ABSTRACT:
A digital signal repeater system, including means for controlling the transmitter of the system. The system is substantially immune to fading, interference and noise, and rapidly detects the reception of a digital signal. A first level detector outputs a logical 1 signal to indicate reception of a signal, in response to the level of the IF signal in the receiver. A second level detector indicates when the received signal is digital by filtering the demodulated received signal and generating a logical 1 output when the received signal has a substantial component at a predetermined clock frequency. The two logical output signals are applied to an AND gate and the output is smoothed and compared by a comparator to a reference level. The output of the comparator is used to control the transmitter. In another embodiment, a third level detection circuit determines whether the clock frequency signal has been detected for a comparatively long period of time and, if so, lowers the reference level supplied to the comparator to stabilize its output.

REFERENCES:
patent: 3045185 (1962-07-01), Mathwich
patent: 3110768 (1963-11-01), Pustelnyk
patent: 3383465 (1968-05-01), Wilson
patent: 4327356 (1982-04-01), Gilliland
W. R. Bonnett, "Statistics of Regenerative Digital Transmission", The Bell System Technical Journal, pp. 1501-1542, Nov. 1958.
F. M. Gardner, "Phaselock Techniques", pp. 117-119, John Wiley & Sons, Inc., 1966.

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