Patent
1994-04-06
1996-02-20
Canney, Vincent P.
G06F 1100
Patent
active
054936470
ABSTRACT:
A digital signal recording apparatus includes: a level encoder for encoding a digital signal into the first to N-th level data, N being an integer greater than 1; a solid state memory having a data storage area and an auxiliary information storage area, the data storage area being writable for the first to N-th level data; and a write controller for, when the writable area in the data storage area is exhausted, freeing at least a part of an area in the data storage area in which level data other than the first level data is stored, for storing level data including at least the first level data into the freed area in the data storage area, and for storing auxiliary information indicating attributes of the stored level data into the auxiliary information storage area.
REFERENCES:
patent: 5105463 (1992-04-01), Veldhuis et al.
patent: 5438643 (1995-08-01), Akagiri et al.
Microprocessors and Programmed Logic by Kenneth L. Short .COPYRGT.1987 by Prentice-Hall, Inc. pp. 430-432.
Kita Kazue
Matsumoto Michio
Misaki Masayuki
Miyasaka Syuji
Nagano Toshihiko
Canney Vincent P.
Matsushita Electric - Industrial Co., Ltd.
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