Digital signal processor with cascaded SIMD organization

Electrical computers and digital processing systems: processing – Processing architecture – Superscalar

Reexamination Certificate

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C712S022000

Reexamination Certificate

active

10456793

ABSTRACT:
A digital signal processor (DSP) includes dual SIMD units that are connected in cascade, and wherein results of a first SIMD stage of the cascade may be stored in a register file of a second SIMD stage in the cascade. Each SIMD stage contains its own resources for storing operands and intermediate results (e.g., its own register file), as well as for decoding the operations that may be executed in that stage. Within each stage, hardware resources are organized to operate in SIMD manner, so that independent SIMD operations can be executed simultaneously, one in each stage of the cascade. Intermediate operands and results flowing through the cascade are stored at the register files of the stages, and may be accessed from those register files. Data may also be brought from memory directly into the register files of the stages in the cascade.

REFERENCES:
patent: 4710867 (1987-12-01), Watanabe
patent: 4745547 (1988-05-01), Buchholz et al.
patent: 4827407 (1989-05-01), Nakatani
patent: 4870569 (1989-09-01), Nakatani et al.
patent: 5200915 (1993-04-01), Hayami et al.
patent: 5537606 (1996-07-01), Byrne
patent: 5560035 (1996-09-01), Garg et al.
patent: 5669013 (1997-09-01), Watanabe et al.
patent: 5689677 (1997-11-01), MacMillan
patent: 5838984 (1998-11-01), Nguyen et al.
patent: 6044448 (2000-03-01), Agrawal et al.
patent: 6049859 (2000-04-01), Gliese et al.
patent: 6052766 (2000-04-01), Betker et al.
patent: 6266758 (2001-07-01), van Hook et al.
patent: 6272616 (2001-08-01), Fernando et al.
patent: 6288723 (2001-09-01), Huff et al.
patent: 6308252 (2001-10-01), Agarwal et al.
Prasad et al. . “Half-Rate GSM Vocoder Implementation On A Dual Mac Digital Signal Processor”, 1997 IEEE pp. 619-622.
Yarlagadda, “Lextra Adds DSP Extensions”, Microdesign Resources, Aug. 23, 1999. Microprocessor Report.

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