Digital signal processor for fixed and floating point data

Details Digital signal processor for fixed and floating point data Digital signal processor for fixed and floating point data

1989-04-14

1992-09-15

Pellinen, A. D.

Coded data generation or conversion

Digital code to digital code converters

Complementers

377 41, H03M 724

Patent

active

051481618

ABSTRACT:
A digital signal processor comprises a code converter which converts an integer coded in a Binary Two's Complement (BTC) code to an integer coded in a Sign Magnitude Binary (SMB) code and/or a code converter which converts the SMB code to the BTC code. An integer coded in the BTC code and stored in an m-bits register is converted to an integer coded in the SMB code and input to an n-bits register, by an EXCLUSIVE OR processing of the bits with the sign bits and by supplementing a logic "1" in the less significant bit next to the least significant bit of the result of the exclusive OR operation. An integer coded in the SMB code and stored in an n-bits register is converted to an integer coded in the BTC code and input to an m-bits register, by an EXCLUSIVE OR processing of m-1 bits of magnitude bits with a sign bit. The code converters have a relatively simple construction, will not output an incorrect result, and are most suitable for processing AC signals.

REFERENCES:
patent: 3786490 (1974-01-01), Hallock
patent: 4520347 (1985-05-01), Campbell
patent: 4733591 (1988-03-01), Kaneko et al.
Analog to Digital Conversion Handbook, Analog Devices, pp. 183-186, 1986.

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