Digital signal processor, error detection method, and recording

Details Digital signal processor, error detection method, and recording Digital signal processor, error detection method, and recording

1995-09-06

1998-06-30

Baker, Stephen M.

Excavating

G11B 2018

Patent

active

057744700

ABSTRACT:
A playback signal processing circuit for reducing decode errors and enabling high-density digital magnetic recording and a digital magnetic recording reproducing unit using the playback signal processing circuit are provided. An estimated waveform generation circuit uses the decoding result of a PRML channel to generate an ideal playback signal waveform. A subtractor provides a waveform representing a difference between the waveform and an actual playback signal. There is a high probability that error bits will occur at an interval of two or four bits because of the nature of GCR code and maximum-likelihood decoding; in the error state of each bit, one bit is incremented by one with respect to the correct bit value and the other signal bit is decremented by one. From this fact, an error detection circuit discriminates an error difference waveform pattern and an error discrimination circuit detects an error bit interval, whereby an error correction circuit carries out error bit correction.

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G. David Forney, "Maximum-Likelihood Sequence Estimation of Digital Sequences in the Presence of Intersymbol Interference", IEEE Transactions on Information Theory, vol. IT-18, No. 3 May 1972 PP. 363-378.
H. Kobayashi, "Application of Probabilistic decoding to Digital Magnetic Recording Systems," IBM J. Res. Develop., Jan. 1971 pp. 64-74.
Cideciyan et al., "A PRML System for Digital Magnetic Recording, " IEEE J. on Selected Areas in Communications, vol. 10, No. 1, Jan. 1992 pp. 38-56.

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