Digital signal processing system for parallel processing of subs

Details Digital signal processing system for parallel processing of subs Digital signal processing system for parallel processing of subs

1990-02-23

1992-07-14

Kostak, Victor R.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358105, 358138, 358135, 358136, H04N 712

Patent

active

051307979

ABSTRACT:
A video codec system inputs consecutively frame after frame of sub-sampled video data obtained by sub-sampling video data in units of frames. The video data is coded in parallel by internal coding circuits. This averages the numbers of significant pixels in the sub-sampled video data to be processed. The coded video data is composed so as to comply with specifications of the receiving equipment. Upon transmission, the data is again sub-sampled depending on the number of coding circuits on the receiving side. Each piece of the sub-sampled data is given a header for consecutive transmission. This allows for a certain period of time between pieces of data that arrive at the receiving side, thereby eliminating time differences in receiving and coding.

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T. Murakami et al., "A DSP Architectural Design for Low Bit-Rate Motion Video Codec", IEEE Trans. CAS-36, No. 10 (1989), pp. 1267-1274.

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