Digital signal processing system

Cryptography – Key management – Having particular key generator

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36422421, 364717, 331 38, H04L 900

Patent

active

054328535

ABSTRACT:
A selector circuit (11) generates generator polynomial information (SD) by performing a predetermined logic operation in response to a random number signal (S1). A quasi-random code generator circuit (1) outputs a quasi-random code (RP) by using a generator polynomial determined based on the generator polynomial information (SD). An exclusive-OR gate (6) scrambles an input digital signal (DI) by calculating the exclusive-OR of the input digital signal (DI) applied to its first input and the quasi-random code (RP) applied to its second input, to output a scrambled output digital signal (DO). The generator polynomial may be changed for each packet, whereby a digital signal processing system is permitted to transmit and receive the scrambled digital signal which is difficult to decode.

REFERENCES:
patent: 3700806 (1972-10-01), Vasseur
patent: 4304962 (1981-12-01), Fracassi et al.

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