Digital signal processing circuit selectively operable in either

Details Digital signal processing circuit selectively operable in either Digital signal processing circuit selectively operable in either

1994-11-28

1996-04-09

Heyman, John S.

Boots, shoes, and leggings

377 72, 377 73, 331 78, H04L 906

Patent

active

055067964

ABSTRACT:
A circuitry with a pseudorandom noise generative function has a shift register for converting serial data into parallel data, an exclusive OR gate electrically connected to the shift register for fetching outputs from the shift register, the exclusive OR gate supplying exclusive ORed data to the shift register for use in generating a pseudorandom noise and a switch electrically connected to a data line transmitting serial digital data to be processed therein and an output of the exclusive OR gate for fetching the digital data and the exclusive ORed data respectively to select the serial digital data or the exclusive ORed data in response to a selective signal, the switch being electrically connected to the shift register for supplying the serial digital data or the exclusive ORed data to the shift register, thereby selecting a normal processing mode for the digital data or a pseudorandom noise generative mode for the exclusive ORed data.

REFERENCES:
patent: 4531022 (1985-07-01), Pioli
patent: 4905241 (1990-02-01), Schmid et al.
patent: 5105376 (1992-04-01), Pedron

Affiliated with

Also associated with

Rating

Digital signal processing circuit selectively operable in either does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital signal processing circuit selectively operable in either, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital signal processing circuit selectively operable in either will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-143673