Digital signal processing circuit driven by a switched clock and

Details Digital signal processing circuit driven by a switched clock and Digital signal processing circuit driven by a switched clock and

1988-03-07

1989-08-22

Shepperd, John W.

Facsimile and static presentation processing

Static presentation processing

Attribute control

358 13, 358 19, 358 31, 358148, 358 11, H04N 964

Patent

active

048600903

ABSTRACT:
A digital television receiver includes a decision circuit for deciding whether an input television signal is a standard signal or a nonstandard signal. A first clock signal generator circuit for generating a first sampling clock signal synchronized with a color burst signal is provided in combination with a second clock signal generator circuit for generating a second sampling clock signal synchronized with a horizontal synchronizing signal. When the standard television signal is received, the television signal is processed by employing the first sampling clock signal. When the nonstandard television signal is received, the television signal is processed by employing the second sampling clock signal.

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