Digital signal processing based implementation of a feed...

Amplifiers – With amplifier bypass means

Reexamination Certificate

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Reexamination Certificate

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07015753

ABSTRACT:
A digital signal processing based feed forward amplifier includes a delay circuit which receives a portion of the input signal and generates a delayed input signal. A first analog to digital converter receives another portion of the input signal and generates a digitized input signal. A main amplifier receives the delayed input signal and generates a main amplified signal. A second analog to digital converter receives at least a portion of the main amplified signal and converts it to a digitized main amplified signal. A digital signal processor receives the digitized input signal and the digitized main amplified signal and generates a digitized error signal. The digitized error signal is converted to an analog error signal by a digital to analog converter. An error amplifier receives the analog error signal and amplifies it to generate an amplified error signal. This error signal includes a noise and distortion component which is substantially the same in magnitude as the noise and distortion component of the main amplified signal. The amplified error signal and the main amplified signal are combined so that the noise and distortion components of each subtract, leaving substantially only the amplified desired signal component remaining in the amplified input signal, which is outputted by the feed forward amplifier. A third analog to digital converter converts a portion of the amplified error signal to a digitized amplified error signal, and a fourth analog to digital converter converts a portion of the output signal to a digitized output signal. The digitized output signal and the digitized amplified error signal are provided to the digital signal processor which generates the digitized error signal in response thereto.

REFERENCES:
patent: 6583739 (2003-06-01), Kenington
patent: 2004/0001559 (2004-01-01), Pinckley et al.

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