Digital signal processing

Details Digital signal processing Digital signal processing

1989-07-05

1992-06-09

Gregory, Bernarr E.

Cryptography

Particular algorithmic function encoding

Public key

380 9, 380 28, 380 37, 380 49, H04L 930, H04L 906

Patent

active

051214296

ABSTRACT:
For more convenient mechanisation, the modulo m reduction of a binary number P can be carried out by conditionally summing the modulo m reductions of a power series of two and then modulo m reducing the sum. The modulo m reductions of the series, called the `residues` of the series, can be pre-calculated and stored but this may be inconvenient if they are long in terms of numbers of bits. Herein, the residues are calculated in sequence by a recursive process, each residue being calculated from the next preceeding one, this leading to a `serial` arrangement for generating the residues which can be incorporated into a serial modulo m reduction unit. Such a serial modulo m reduction unit is convenient for implementation as an integrated circuit especially as part of an overall circuit for encryption and decryption of digital signals.

REFERENCES:
patent: 4759064 (1988-07-01), Chaum
patent: 4841570 (1989-06-01), Cooper
Willoner et al., "An Algorithm for Modular Exponentiation", IEEE Proceedings of the 5th Symposium on Computer Arithmetic, May 1981, pp. 135-138.
Thomas et al., "Implementing Exact Calculations in Hardware", IEEE Transaction on Computers, vol. C-36, No. 6, Jun. 1987, pp. 764-768.

Affiliated with

Also associated with

Rating

Digital signal processing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital signal processing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital signal processing will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1811294