Digital signal processing

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G06F 15332

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active

052028470

ABSTRACT:
Digital signal processing circuitry for calculating separable two dimensional linear transforms on blocks of data elements includes two processors coupled as a linear pipeline. Each processor carries out a one dimensional linear transform effecting multiplication of transform coefficients by repeated addition in a carry save adder network to form a plurality of inner products. The two processors may effect simultaneously different transforms on respective blocks of data.

REFERENCES:
patent: 4601006 (1986-07-01), Liu
patent: 4675836 (1987-06-01), Arnould et al.
patent: 4821224 (1989-04-01), Liu et al.
patent: 5034910 (1991-07-01), Whelchel et al.
patent: 5038311 (1991-08-01), Monastra et al.
Stanley A. White, "Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review" IEEE ASSP Magazine, Jul. 1989, pp. 7-19.

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