Motion video signal processing for recording or reproducing – Local trick play processing – With randomly accessible medium
Reexamination Certificate
1998-08-19
2003-03-11
Nguyen, Huy (Department: 2615)
Motion video signal processing for recording or reproducing
Local trick play processing
With randomly accessible medium
C386S349000
Reexamination Certificate
active
06532337
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a digital-signal playback apparatus and can be applied to bitabi decoding carried out typically in a video tape recorder and an optical-disc apparatus. By equalizing an input signal on the basis of a result of tentative discrimination of an input signal, limiting the number of possible state transitions of the equalized signal and determining a most probable state transition among the limited number of possible state transitions, it is possible to carry out viterbi decoding on a digital signal by using a simple configuration and, when necessary, at a high speed.
In the conventional playback equipment such a video tape recorder and an optical-disc apparatus, by processing a playback signal by execution of viterbi decoding, a digital signal recorded at a high density can be played back with a high degree of reliability.
In the viterbi decoding, n different states determined by intercode interference are defined by a combination of most recently received input data and, for new incoming input data, the input data is processed by updating the present state into a new state following the present state. To put it concretely, the n different states are determined by immediately preceding (m−1) bits where m is the length of the intercode interference. For example, if the input data is 1 and 0 digital data, n different states exist where n=2
(m−1)
.
For n different states prescribed as described above, the degree of likelihood of a transition from the present state to a subsequent state is represented by a cumulative value of the squares of differences between an amplitude reference value and an actual playback signal which is accumulated prior to the occurrence of such a state transition. In this case, the distribution of noise included in the playback signal is assumed to be a Gaussian distribution and the amplitude reference value is the value of the playback signal in a state with no noise. Thus, in the viterbi decoding, a cumulative value is computed for each path for which a transition from the present state to one of the n different states is probable and an impending transition is judged to be a transition occurring through a path with the highest degree of likelihood or with a smallest cumulative value. Then, the present state is updated into a new state determined by the path with the highest degree of likelihood and, at the same time, the degree of likelihood of each transition to a further state following the new state and the history of discrimination values are also updated as well for the new state.
If most probable state transitions are sequentially detected one transition after another in this way, at a predetermined stage, pieces of history data of several immediately preceding bits are merged into a single piece of history data, confirming discrimination results obtained so far. In this way, the viterbi encoding identifies a playback signal.
In the viterbi decoding for processing a playback signal as described above, due to the fact that a playback signal can be discriminated by utilizing a signal power of the playback signal at its maximum when noise superposed on the playback signal is random noise, an error rate can be improved in comparison with a decoding system wherein decoding is carried out by comparing the playback signal with a predetermined threshold value for each bit.
FIG. 7
is a table showing state transitions in the case of an application of EPR (Extended Partial Response)
4
equalization to RLL (Run Length Limited) (
1
,
7
) code. It should be noted that the RLL (
1
,
7
) code is code wherein the logic value 1 or 0 appears consecutively at least twice in a row, that is, the logic value 1 or 0 never appears once. This limitation is called d=1 limitation. Thus, the RLL (
1
,
7
) code is code produced by an encoding system based on the d=1 limitation. On the other hand, the EPR
4
equalization is a PR (1, 1, −1, −1) technique wherein, for ‘1’ input data, intercode interference occurs till the bit lagging behind the input data by 3 bits.
Thus, in the application of EPR (Extended Partial Response)
4
equalization to RLL (Run Length Limited) (
1
,
7
) code, a history of previous input data up to the a bit leading ahead of new input data by 3 bits univocally determines a state transition (hence, output data) caused by the new input data following the history of previous input data. For example, let a [k] be new input data and a [k-
1
], a [k-
2
] and a [k-
3
] be pieces of previous input data leading ahead of the input data a [k] by 1 clock, 2 clocks and 3 clocks respectively. A state b [k-
1
] determined by the pieces of input data a [k-
1
], a [k-
2
] and a [k-
3
] is expressed by a string of the symbol S and values of the pieces of input data a [k-
1
], a [k-
2
] and a [k-
3
]. For example, notation S
000
shown in the table of
FIG. 7
is the state determined by pieces of input data having values of 0, 0 and 0. As shown in the table, in the state (S
000
), output data c [k] of 0 is obtained from input data a [k] of 0 and the present state b [k-
1
] changes from S
000
to a next state b [k] of S
000
.
In the case of RLL (
1
,
7
) code, the states (S
010
) and (S
101
) do not exist due to the d=1 limitation described above. Each state b [k-
1
] can transit to either of 2 states in dependence on whether the input data is 0 or 1. Since preceding 3 bits of input data provide a total of different 8 states, the exclusion of the states (S
010
) and (S
101
) leaves only 6 different states. In addition, in the case of RLL (
1
,
7
) code, the output c [k] has 5 different amplitude reference values, namely, −2, −1, 0, 1 and 2. Transitions among states are expressed by a trellis diagram as shown in FIG.
8
.
In the viterbi decoding, the squares (branch metrics) of differences between an EPR
4
equalization playback signal and an EPR
4
equalization amplitude reference value are accumulated by repeatedly referring to the trellis diagram shown in
FIG. 8 and
, then, a path that minimizes the cumulative value is selected. Finally, the input signal is decoded.
FIG. 9
is a block diagram showing a playback signal processing system employed in a video tape recorder to which the viterbi decoder of this type is applied. The video tape recorder
1
records and plays back a digital video signal by application of the EPR
4
equalization to the RLL (
1
,
7
) code described above. That is to say, an integrating equalizer
2
carries out Nyquist equalization on a playback signal RF generated by a magnetic head to output an analog playback signal RF. A comparison circuit
3
converts a playback signal RF output by the integrating equalizer
2
into binary data, outputting a binary signal S
1
as a result of the binary conversion.
A phase comparator
4
compares the phase of a clock signal CK generated by a voltage controlled oscillator (VCO)
5
with the phase of the binary signal S
1
, outputting a result of the phase comparison to an integrator
6
. The integrator
6
imposes a band limit on the result of the phase comparison, outputting an error signal to the voltage controlled oscillator
5
. The voltage controlled oscillator
5
generates the clock signal CK by varying the oscillation frequency so that the error signal is sustained at a predetermined level. The phase comparator
4
, the voltage controlled oscillator
5
and the integrator
6
constitute a PLL circuit for generating the clock signal CK from the playback signal RF output by the integrating equalizer
2
.
An analog-to-digital (A/D) converter
7
converts the analog playback signal RF output by the integrating equalizer
2
by using the clock signal CK as a reference into a digital playback signal DRF as a result of the A/D conversion. A conventional viterbi decoder
8
receives the digital playback sign
Frommer William S.
Frommer & Lawrence & Haug LLP
Nguyen Huy
Polito Bruno
Sony Corporation
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