Digital serializer and time delay regulator

Details Digital serializer and time delay regulator Digital serializer and time delay regulator

1992-06-19

1994-09-20

Chin, Stephen

Pulse or digital communications

Spread spectrum

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375119, 328155, 307269, 307595, H04L 700, H04L 2536, H04L 2540, H03D 324

Patent

active

053496124

ABSTRACT:
A self calibrated time delay circuit including a plurality of serially connected unit delay cells each having an output tap which is selectable, a registration means for simultaneously determining the status of each output node of each of the unit delay cells, combinatorial and sequential logic units for analyzing said registration means and sending error correction commands to an up/down controller, said up down controller providing a command code for controlling the delay of each said unit delay by selecting which tap is output from said unit delay cell.

REFERENCES:
patent: 4763327 (1988-08-01), Fontaine et al.
patent: 4805195 (1989-02-01), Keegan
patent: 4899071 (1990-02-01), Morales
patent: 5109394 (1992-04-01), Hjerpe et al.
patent: 5146121 (1992-09-01), Searles et al.
patent: 5159205 (1992-10-01), Gorecki et al.

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