Digital sampling rate converter for compensation for drop of...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S300000

Reexamination Certificate

active

07035888

ABSTRACT:
Disclosed is a digital sampling rate converter for compensating for a drop of an in-band signal, the digital sampling rate converter including a CIC (Cascaded Integrator-Comb) decimator for performing a decimation operation at a first decimation ratio based on an overall decimation ratio, for an input signal; a sub-decimator for performing a decimation operation at a second decimation ratio for a signal output from the CIC decimator; and a compensation unit for performing at least two multiplication operations and two addition operations with respect to a signal output from the sub-decimator using a lowest operation clock frequency in an assigned band.

REFERENCES:
patent: 6279019 (2001-08-01), Oh et al.
patent: 6643675 (2003-11-01), Piirainen
patent: 2002/0150173 (2002-10-01), Buda
patent: 2004/0107078 (2004-06-01), Chiu et al.
Hogenauer, “An Economical Class of Digital Filters for Decimation and Interpolation”, IEEE Transactions on Acoustics, Speech, and Signal Process, vol. ASSP-29, No. 2, Apr. 1981, pp. 155-162.
Kwentus et al., “Application of Filter Sharpening to Cascaded Integrator-Comb Decimation Filters”, IEEE Transactions on Signal Processing, vol. 45, No. 2, Feb. 1997, pp. 457-467.
Oh et al., “On the Use of Interpolated Second-Order Polynomials for Efficient Filter Design in Programmable Downconversion”, IEEE Journal on Selected Areas in Communications, vol. 17, No. 4, Apr. 1999, pp. 551-560.

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