Digital resolver

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Details

235 92MP, 318661, 340347SY, 364603, 364730, G06J 100, G05B 101

Patent

active

043216846

ABSTRACT:
A digital resolver incorporates an adder for periodically and repetitively calculating the sum of two operands, one of which is increasing and the other decreasing at a rate determined by the excitation frequency of a resolver. The phase of the one of the operands is responsive to the angular position of the resolver rotor, while the phase of the other operand is responsive to forward and reverse command pulses. The sum produced by the adder is zero when the resolver assumes its commanded position, and at other times identifies the magnitude and direction of the resolver error. A digital-to-analog converter is provided for converting the error signal to an analog voltage.

REFERENCES:
patent: 3078400 (1963-02-01), Kilroy et al.
patent: 3183421 (1965-05-01), Herchenroeder
patent: 3676650 (1972-07-01), Henegar
patent: 4079374 (1978-03-01), Cox, Jr.
patent: 4134106 (1979-01-01), Hungerford

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