Digital registers with serial accessed mode control bit

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G01R 3128

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048478393

ABSTRACT:
A reconfigurable digital register that can be serially loaded has an additional bit associated with the register which holds information indicative of a mode of operation of the register. The mode control bit is located such that it can be serially loaded along with the other bits. A particularly useful embodiment is to use the mode control bit to configure the register as either a test pattern generator or a signature analysis register in support of integrated circuit self-test functions.

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Project Status Report VHSIC Phase 2, Contract No. F33615-84-C-1500, May 1985.
Konemann et al., Built-In Test for Complex Digital Integrated Circuits, IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, Jun. 1980, pp. 315-319.
Bhavsar, Self-Testing by Polynomial Division, Digest of Papers-1981 Intl. Test Conf., IEEE, pp. 208-216.
Fasang, Circuit Module Implements Practical Self-Testing, Electronics, vol. 88, No. 1557, May 19, 1982, pp. 164-167.

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