Digital receiver with tunable analog filter and method therefor

Pulse or digital communications – Receivers – Automatic frequency control

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Details

455266, H04L 2706, H04L 2708

Patent

active

059498323

ABSTRACT:
A digital data receiver includes a tunable analog matched filter circuit having a variable bandwidth responsive to the bit error rate (BER) of the decoded data. The bandwidth of the analog filtering circuit is controlled by a tuning control signal that includes a coarse tuning signal combined with a fine tuning signal. The coarse tuning signal is generated by a frequency-to-current converter and the fine tuning signal is generated by a current-scaling digital-to-analog converter (DAC). The DAC input signal is produced by a DAC control circuit that includes a BER comparator and a DAC control state machine. The BER comparator determines whether the BER has improved or degraded in response to a previous tuning command. To optimize the BER in the decoded data signal, the state machine increments or decrements the value of the fine tuning signal, which in turn alters the filter bandwidth.

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Stanford Telecom ASIC & Custom Products Catalog, Eighth Edition,-cover sheet and pp. 55-67.

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