Digital receiver with reduced memory requirement for Viterbi equ

Details Digital receiver with reduced memory requirement for Viterbi equ Digital receiver with reduced memory requirement for Viterbi equ

1991-11-26

1994-04-26

Chin, Stephen

Pulse or digital communications

Repeaters

Testing

371 401, 375 94, H03H 730

Patent

active

053073746

ABSTRACT:
A receiver for digital information transmitted over a dispersive channel. Where the channel has a storage depth of n bits, memory requirements for an adaptive equalizer are reduced by storing transition states for only 2.sup.n' states, where n'<n, and storing at least n previous bits for 2.sup.n' states in a memory path register. At the same time the equalizer may be based on a reduced state model with 2.sup.n' states. Only n' bits are determined directly by state transitions; the remaining n-n' bits appear from each memory path leading to the respective state, stored in the memory path register.

REFERENCES:
patent: 4748626 (1988-05-01), Wong
patent: 4823346 (1989-04-01), Kobayashi et al.
patent: 5119400 (1992-06-01), Koch
IEEE Global Telecommunications Conference & Exhibition Globecom '90, Dec. 2-5, 1990, San Diego, US, vol. 3, pp. 1679-1684.

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