Digital radio receiver having limiter amplifiers and logarithmic

Details Digital radio receiver having limiter amplifiers and logarithmic Digital radio receiver having limiter amplifiers and logarithmic

1994-02-24

1996-07-02

Chin, Stephen

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

375346, 455296, H03D 100, H04L 2706

Patent

active

055330649

ABSTRACT:
In a digital radio receiver, an amplitude limiter circuit (20, 21) is included for producing a constant-amplitude IF signal from a received digitally modulated IF signal. An orthogonal detector (22) orthogonally mixes the constant-amplitude signal with a reference carrier and produces a in-phase baseband signal and a quadrature-phase baseband signal. The baseband signals are converted to first and second digital signals (24, 25) and supplied to multipliers (26, 27), respectively. A logarithmic. detector circuit (30) is coupled to the amplitude limiter (20) for generating a signal representative of the amplitude of the received IF signal. The logarithmic scale of the amplitude signal is converted to linear scale by a logarithmic-to-linear converter circuit (32, 33) and supplied to the multipliers (26,27) in which it is multiplied with the digital baseband signals. The outputs of the multipliers are coupled to an equalizer (28) for eliminating bit errors. The outputs of the equalizer (28) are then directed to the demodulator (29) for recovering the modulating signal.

REFERENCES:
patent: 4090150 (1978-05-01), Vachenauer
patent: 4197501 (1980-04-01), Gammel et al.
patent: 4988951 (1991-01-01), Tomita
patent: 5048059 (1991-09-01), Dent
IEEE International Conference on Communications, Suzuki et al., Boston ICC 11-14 Jun. 1989; "High Bit Rate Digital Mobile Radio Transmission With a Decision Feedback Equalizser," pp. 171-172.

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