Digital pulse width modulation

Details Digital pulse width modulation Digital pulse width modulation

2006-02-14

2006-02-14

Shingleton, Michael B (Department: 2817)

Modulators

Pulse or interrupted continuous wave modulator

Pulse width modulator

C329S350000, C329S350000, C329S350000, C347S009000

Reexamination Certificate

active

06998928

ABSTRACT:
A digital technique for pulse width modulation (PWM) utilizes a tapped delay line304receiving a reference clock and generating a plurality of time delayed reference clock transitions having finer time resolution than the reference clock signal. A multiplexer120receives the plurality of time delayed reference clock transitions as an input thereto and producing an output when one of the plurality of time delayed reference clock transitions is addressed. An accumulator circuit524generates control timing signals associated with the input signal sampling rate Fsamplethat are used to select outputs from the delay line304representing a pulse width modulated output signal.

REFERENCES:
patent: 6439679 (2002-08-01), Roylance
patent: 6798258 (2004-09-01), Rieven
“IEEE Standard Dictionary of Electrical and Electronics Terms” Third Edition Wiley-Interscience 1984.
Dancy, Abram P., and Chandrakasan “Ultra Low Power Control Circuits for PWM Converters,” Power Electronics Specialists Conference, IEEE 1997, vol. 1 pp. 21-27.
Hiorns, R. E., and Sandler “Power Digital to Analogue Conversion Using Pulse Width Modulation and Digital Signal Processing,” IEEE Proceedings—G, vol. 140, No. 5, Oct. 1993.

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