Digital pulse processor for determining leading and trailing tim

Details Digital pulse processor for determining leading and trailing tim Digital pulse processor for determining leading and trailing tim

1990-03-05

1992-06-09

Olms, Douglas W.

Pulse or digital communications

Repeaters

Testing

375102, 375 99, 328108, 307518, H04L 2706

Patent

active

051214130

ABSTRACT:
A Digital Pulse Processor (DPP) designed to accept pulsed inputs and produce digital pulse descriptor word (PDW) outputs accepts pulsed signals from three adjacent channelized inputs. The DPP then derives a measurement of pulse amplitude from the peak value in the center frequency channel. The relative peak amplitudes between channels are used to establish aa fine frequency offset. The fine frequency offset is used in conjunction with coarse frequency inputs to compute a pulse frequency estimate. An internal counter generates a time reference for time of arrival (TOA) and pulse width measurements. The TOA and pulse width measurements are based on calculations to establish three dB points on the leading and trailing edges of the pulse. This pulse characterization information is produced in real time at the optimum signal-to-noise ratio, and is independent of incoming amplitude, rise/fall time, and pulse width. The pulse characterization information is accumulated and formatted into four 16-bit PDWs for output during the subsequent pulse processing period A RESET output is generated to mark the end of the pulse processing period, both for normal operation and for cases where a pulse is expected (based on normal input control) but is not detected.

REFERENCES:
patent: 3611298 (1971-10-01), Jacobson
patent: 3646445 (1972-02-01), Reindl
patent: 3921076 (1975-11-01), Currie
patent: 4507795 (1985-03-01), Wagner
patent: 4972441 (1990-11-01), Roberts et al.

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