Digital pulse generator of phase and frequency periodically cont

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358150, H04N 504

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active

049740822

ABSTRACT:
In a video signal processor incorporating a reference clock pulse generator of highly precise frequency, two pulse generators, one preceding the drop-out corrector circuit which includes a picture memory and another following the drop-out corrector, are controlled in phase and frequency periodically in response to a horizontal synchronizing pulse. An addition circuit (101) the output of which is intermediately stored in a 20 place register (105) has a data input (104) to which bits of higher binary significance, for phase control, are supplied in response to the synchronizing pulse and thereafter bits of lower binary digit significance are supplied by a velocity error detection circuit for frequency control during the remainder of a television line interval. The output of the 20 place register is fed back to another input of the addition circuit, to produce a sawtooth wave resulting from the overflow of the addition circuit, which is a submultiple of the reference clock pulse generator frequency. A PROM, responsive to the 10 most significant output bits of the addition circuit, and subsequent processing circuits (114,118, 115) convert the sawtooth wave to an analog sinusoidal wave which is then frequency multiplied to a frequency approximating the frequency of the reference clock pulse generator.

REFERENCES:
patent: 4652838 (1987-03-01), Nossen
"High Speed Programmable Clock Generator", by Koennecker; IBM Technical Disclosure Bulletin; vol. 27, No. 4B, Sep. '84, pp. 2509-2510.

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