Digital processor having plurality of memories and plurality of

Details Digital processor having plurality of memories and plurality of Digital processor having plurality of memories and plurality of

1992-11-16

1995-12-12

Elmore, Reba I.

Boots, shoes, and leggings

3642448, 36496431, 364DIG1, 395375, G06F 1202

Patent

active

054758289

ABSTRACT:
In a digital processor having a plurality of memories and a plurality of ALUs, each of address ports of each of the memories is associated with an address generation circuit capable of executing a loop processing required for address generation. With this arrangement, it is possible to access a plurality of memories, and therefore, the processing efficiency is improved.

REFERENCES:
patent: 4862407 (1989-08-01), Fette et al.
patent: 5045993 (1991-09-01), Murakami et al.
patent: 5155852 (1992-10-01), Murakami et al.
patent: 5206940 (1993-04-01), Murakami et al.
patent: 5253346 (1993-10-01), Okabayashi et al.
P. Hampton et al., "Multiprocessor APs Simplify Calculations for Image Processing", Computer Technology Review, vol. 1, No. 3, 1986, pp. 41-45.
K. Kaneko et al., "A 50ns DSP With Parallel Processing Architecture"; 1987 IEEE Int. Conf. On Solid-State Circuits, Feb. 1987, pp. 158-159.

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