Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1978-07-13
1980-10-07
Cook, Daryl W.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358154, 358158, H04N 504, H04N 510
Patent
active
042272149
ABSTRACT:
A digital vertical synchronization system for use in a television receiver is disclosed. A vertical synchronization separator circuit receives a composite synchronizing signal and separates a vertical synchronizing signal from the composite signal. A clock counter receives a clock input signal having a frequency equal to a positive integer N times as high as the frequency of a horizontal synchronizing signal separated from the composite signal. The clock counter produces a first output signal having a repetition frequency substantially equal to the vertical synchronizing signal and having a pulse width required for generating a vertical deflection signal and a second output signal having a pulse width equal to or smaller than the pulse width of the vertical synchronizing signal. A phase comparator compares the phases of the second output signal of the clock counter and the vertical synchronizing signal and produces a reset signal when the phases of the two signals are not coincident. The reset signal is applied to the reset terminal of the clock counter.
REFERENCES:
patent: 3688037 (1972-08-01), Ipri
patent: 3708621 (1973-01-01), Yamamoto
patent: 3821653 (1974-06-01), Fretwell
patent: 3878335 (1975-04-01), Balaban
patent: 3878336 (1975-04-01), Balaban
patent: 3899635 (1975-08-01), Steckler et al.
patent: 3925613 (1975-12-01), Kokado
patent: 4083176 (1978-04-01), Higashi
patent: 4096528 (1978-06-01), Tuma et al.
Morito Hiroshi
Yamashita Kenji
Cook Daryl W.
Nippon Electric Co. Ltd.
Psitos Aristotelis M.
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