Digital processing apparatus for simultaneously processing two o

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395550, 3642314, 3642316, 3642702, 3642713, 3642814, 364DIG1, G06F 900, G06F 938, G06F 944

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053394160

ABSTRACT:
A digital signal processing apparatus according to the present invention includes two or more address registers associated with at least one of an instruction memory, a data memory, or a coefficient memory and two or more data registers associated with a computing block, and these two or more registers are duty cycled switched between different jobs being simultaneously processed by the computing block to enable efficient processing on a single chip of jobs that can be processed with different processing speeds, such as jobs suited for high speed processing or low speed processing.

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