Digital PLL with gear shift

Details Digital PLL with gear shift Digital PLL with gear shift

2005-02-08

2005-02-08

Tran, Khai (Department: 2637)

Boring or penetrating the earth

Bit or bit element

Rolling cutter bit or rolling cutter bit element

Reexamination Certificate

active

06851493

ABSTRACT:
A PLL synthesizer (100) includes a gear-shifting scheme of the PLL loop gain constant, α. During frequency/phase acquisition, a larger loop gain constant, α1is used such that the resulting phase error is within limits. After the frequency/phase gets acquired, the developed phase error, which is a rough indication of the frequency offset is in a steady-state condition. While transitioning into the tracking mode, the DC offset is added to the DCO tuning signal preferably the DC offset is added to the phase error signal and the loop constant is reduced from α1to α2. This scheme provides for hitless operation, while requiring a low dynamic range of the phase detector (101).

REFERENCES:
patent: 5369376 (1994-11-01), Leblebicioglu
patent: 5821817 (1998-10-01), McCorkle
patent: 6018556 (2000-01-01), Janesch et al.
patent: 6157271 (2000-12-01), Black et al.
patent: 6192088 (2001-02-01), Aman et al.
patent: 6532271 (2003-03-01), Hwang et al.
patent: 6587529 (2003-07-01), Staszewski et al.
patent: 6732286 (2004-05-01), Sutardja
patent: 0 805 560 (1997-05-01), None
patent: WO 9918670 (1999-04-01), None

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