Digital PLL system

Electricity: motor control systems – Closed loop speed control system for dc motor with commutator – Armature control by digital or combined analog and digital...

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388804, 388911, 388912, 318600, 318607, H02P 517

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active

055486797

ABSTRACT:
A PLL system has a phase comparator for converting the phase difference between a reference clock signal and a feedback clock signal corresponding to a PWM signal Into a binary value, a frequency comparator for converting the frequency difference between the reference and feedback clock signals into a binary value, an automatic gain controller for adjusting the loop gain of the PLL system to a given value whenever the output of the frequency comparator reaches a change point, and a PWM signal generator for generating the PWM signal according to the outputs of the phase comparator, frequency comparator, and automatic gain controller. These components of the PLL system process digital signals, to simplify the structure of the PLL system, expand the range of loop gains to be set, and speedily synchronize the feedback clock signal with the reference clock signal.

REFERENCES:
patent: 4443742 (1984-04-01), Schneider
patent: 4491771 (1985-01-01), Kimura
patent: 4498191 (1985-02-01), Rogers
patent: 5163035 (1992-11-01), Horikiri
patent: 5187722 (1993-02-01), Petty
patent: 5410571 (1995-04-01), Yonekawa et al.
patent: 5430772 (1995-07-01), Lee et al.

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