Digital pixel clock generation circuit and method employing...

Details Digital pixel clock generation circuit and method employing... Digital pixel clock generation circuit and method employing...

2005-05-11

2008-12-02

Osorio, Ricardo L (Department: 2629)

Computer graphics processing and selective visual display system

Display driving control circuitry

C345S213000

Reexamination Certificate

active

07460113

ABSTRACT:
A digital pixel clock generation circuit receives image data and corresponding image presentation time information from at least one external image source. The digital pixel clock generation circuit includes an image presentation timing error determination circuit that produces desired pixel clock frequency control information, such as pixel output clock adjustment control information, based on a difference between an expected presentation time and an actual presentation image time information. A programmable digital waveform generation circuit is programmed based on the produced desired pixel clock frequency and has an input that is responsive to an independent clock source, that is independent from the clock source of the external image source. The programmable digital waveform generation circuit provides a digital representation of an independently generated desired pixel clock which is then output to a digital to analog converter (DAC).

REFERENCES:
patent: 6320574 (2001-11-01), Eglit

Affiliated with

Also associated with

Rating

Digital pixel clock generation circuit and method employing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Digital pixel clock generation circuit and method employing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Digital pixel clock generation circuit and method employing... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4022786