Digital phase selector system and method

Details Digital phase selector system and method Digital phase selector system and method

1994-11-14

1997-07-01

Chin, Stephen

Pulse or digital communications

Synchronizers

H04L 700

Patent

active

056446047

ABSTRACT:
A system and method for transferring data between clock domains operating at substantially the same frequency continuously compares the relationship between a delayed data phase signal driven by a non-delayed source domain clock and a data phase signal sampled by a delayed receiving domain clock. The result of the comparison determines along which one of multiple data paths within the synchronizing circuit the transfer of the data frame will take place. Several data paths with different delays (at least two) transfer the data frame and clock signals. An XNOR comparator responds to the relationship between a delayed data phase signal driven by a non-delayed source domain clock and a data phase signal sampled by a delayed receiving domain clock to determine which one of the multiple data paths transfers the data frame.

REFERENCES:
patent: 4573173 (1986-02-01), Yoshida
patent: 4890303 (1989-12-01), Bader
patent: 5022056 (1991-06-01), Henderson et al.
patent: 5203023 (1993-04-01), Saito et al.

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